Interface circuitry for a receive ring buffer of an as fabric end node device

A method of generating one or more commands to access a ring buffer on an end node device of an advanced switching (AS) fabric, the method comprising:

• receiving information for accessing the ring buffer;
• generating a current command based on the information, the information comprising an address of the ring buffer and a length of data associated with buffer access;
• and
• determining whether the information is for one command or for plural commands;
• wherein, if the information is for plural commands, the method comprises generating the plural commands by updating the information following generation of the current command and by generating a subsequent command using updated information.

A method of aligning data blocks for storage in a ring buffer on an end node device of an advanced switching (AS) fabric, the method comprising:

• identifying a payload block in a row of a first memory containing data blocks, the payload block comprising payload of a data packet;
• generating a control block, the control block comprising packet processing information;
• and
• organizing an output to a data bus to the ring buffer, the output comprising lanes having a width of the data bus, a first lane comprising the control block, the payload block being in the first lane following the control block or in a subsequent lane, the subsequent lane comprising payload blocks that are ordered in a reverse order from which the payload blocks were stored in the first memory.

A machine-readable medium that stores instructions for generating one or more commands to access a ring buffer on an end node device of an advanced switching (AS) fabric, the instructions causing a machine to:

• receive information for accessing the ring buffer;
• generate a current command based on the information, the information comprising an address of the ring buffer and a length of data associated with buffer access;
• and
• determine whether the information is for one command or for plural commands;
• wherein, if the information is for plural commands, the instructions cause the machine to generate the plural commands by updating the information following generation of the current command and by generating a subsequent command using updated information.

A machine-readable medium that stores instructions for aligning data blocks for storage in a ring buffer on an end node device of an advanced switching (AS) fabric, the instructions causing a machine to:

• identify a payload block in a row of a first memory containing data blocks, the payload block comprising payload of a data packet;
• generate a control block, the control block comprising packet processing information;
• and
• organize an output to a data bus to the ring buffer, the output comprising lanes having a width of the data bus, a first lane comprising the control block, the payload block being in the first lane following the control block or in a subsequent lane, the subsequent lane comprising payload blocks that are ordered in a reverse order from which the payload blocks were stored in the first memory.

A storage system that passes data across an advanced switching (AS) fabric, the storage system comprising:

• a first server to manage the storage system;
• and
• plural data servers, each of the plural data servers being in communication with the first server via the AS fabric, the plural data servers each containing one or more disk drives to store data accessible via the AS fabric;
• wherein the first server comprises:
• a receive engine that receives a reply packet in response to a read request packet for data in a disk drive of a target data server, the reply packet containing a first transaction identifier, the receive engine comparing the first transaction identifier to a second transaction identifier from the read request packet, wherein, if the first transaction identifier matches the second transaction identifier, the receive engine decides to store data from the reply packet at an address in a ring buffer that is associated with the second transaction identifier;
• a memory that receives, from the receive engine, data blocks corresponding to the reply packet;
• the data blocks comprising a payload block and a control block, the payload block comprising payload of the reply packet, and the control block comprising packet processing information;
• and
• alignment circuitry to organize an output to a data bus leading to the ring buffer, the output comprising lanes having a width of the data bus, a first lane comprising the control block, the payload block being in the first lane following the control block or in a subsequent lane, the subsequent lane comprising payload blocks that are ordered in a reverse order from which the payload blocks were stored in the memory.