Back to results
US 2006/0041875 A1Published application
Methods and apparatus for creating software basic block layouts
AssigneeIntel Corporation
InventorsRamesh Peri, Zino Benaissa, Srinivas Doddapaneni
Life of this patent
Estimating the term…
Abstract
Methods and apparatus to create software basic block layouts are disclosed. In one example, a method identifies branch data associated with a plurality of machine accessible instructions and identifies a plurality of basic blocks associated with the branch data. The method generates a partial layout from the plurality of basic blocks and generates a substantial layout from the partial layout based on a cost metric.
Claims28
A method comprising:
- identifying branch data associated with a plurality of machine accessible instructions;
- identifying a plurality of basic blocks associated with the branch data;
- generating a partial layout from the plurality of basic blocks;
- and
- generating a substantial layout from the partial layout based on a cost metric.
2 more elements
An apparatus comprising:
- a memory;
- and
- a processor coupled to the memory and configured to:
- identify branch data associated with a plurality of machine accessible instructions;
- identify a plurality of basic blocks associated with the branch data;
- generate a partial layout from the plurality of basic blocks;
- and
- generate a substantial layout from the partial layout based on a cost metric.
5 more elements
A machine readable medium having instructions stored thereon that, when executed, cause a machine to:
- identify branch data associated with a plurality of machine accessible instructions;
- identify a plurality of basic blocks associated with the branch data;
- generate a partial layout from the plurality of basic blocks;
- and
- generate a substantial layout from the partial layout based on a cost metric.
2 more elements
Dependencies are inferred from the claim text.