Interrupts in a graphical programming system

A memory medium comprising program instructions, wherein the program instructions are executable by a processor to perform:

• storing a graphical program, wherein the graphical program comprises a plurality of interconnected nodes which visually indicate functionality of the program, and wherein the graphical program is executable to access a device;
• storing an interrupt service routine (ISR);
• executing the graphical program, wherein said executing comprises:
• registering the ISR with the device;
• and
• the ISR executing in response to an interrupt from the device.

A system for handling interrupts in a graphical program, the system comprising:

• a host computer comprising:
• a processor;
• and
• a memory medium coupled to the processor;
• and
• a device coupled to the host computer;
• wherein the memory medium stores:
• a graphical program, wherein the graphical program comprises a plurality of interconnected nodes which visually indicate functionality of the program, and wherein the graphical program is executable to access the device;
• and
• an interrupt service routine (ISR);
• wherein the graphical program is executable to register the ISR with the host computer;
• wherein the device is operable to generate an interrupt;
• and
• wherein the ISR is operable to execute in response to the interrupt from the device.

A computer-implemented method for handling interrupts in a graphical program, the method comprising:

• storing an interrupt service routine (ISR);
• storing a graphical program on a host computer, wherein the graphical program comprises a plurality of interconnected nodes which visually indicate functionality of the program, wherein the graphical program comprises a first node representing the ISR, and wherein the graphical program is executable to access a device;
• and
• executing the graphical program, wherein said executing the graphical program comprises:
• registering the ISR with the host computer;
• and
• executing the first node in response to an interrupt from the device, wherein said executing the first node comprises executing the ISR.