Method and apparatus for reducing redundant data in a layout data structure

A method of reducing the amount of data in a layout data structure comprising the steps of:

• a. assigning a unique address location to each interconnect within the layout data structure;
• b. detecting a bank of interconnects within the layout data structure using the unique addresses;
• and
• c. replacing all the interconnects within the detected bank with a single large interconnect.

A method of reducing the amount of data in a layout data structure having interconnects identified by coordinates in the layout data structure comprising the steps of:

• a. assigning a unique address location to each interconnect within the layout data structure;
• b. using the unique addresses to detect banks of interconnects within the layout data structure;
• c. selecting locations within each bank where an interconnect will be flagged,
• d. sequentially identifying the location of each interconnect in the layout data structure;
• e. flagging the interconnects located in the predetermined locations:
• and
• f. deleting the flagged interconnects from the layout data structure.

Apparatus for reducing an amount of data in a layout data structure for an integrated circuit (IC) comprising:

• means for identifying interconnects within the layout data structure;
• means for detecting banks of the interconnects;
• means for identifying selected interconnects located within the banks in accordance with a predetermined criteria;
• and
• means for deleting the identified selected interconnects from the layout data structure.

Apparatus for reducing the amount of data in a layout data structure comprising:

• means for assigning a unique address location to each interconnect within the layout data structure;
• means for detecting a bank of interconnects within the layout data structure using the unique addresses;
• and
• means for replacing all the interconnects within the detected bank with a single large interconnect.

Apparatus for reducing the amount of data in a layout data structure having interconnects identified by coordinates in the layout data structure comprising:

• means for assigning a unique address location to each interconnect within the layout data structure;
• means for using the unique addresses to detect banks of interconnects within the layout data structure;
• means for selecting locations within each bank where an interconnect will be flagged;
• means for sequentially identifying the location of each interconnect in the layout data structure;
• means for flagging the interconnects located in the predetermined locations:
• and
• means for deleting the flagged interconnects from the layout data structure.