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US 2006/0041822 A1Published application
Error correction in ROM embedded DRAM
AssigneeMicron Technology, Inc.
InventorsScott Derner, Casey Kurth, Phillip Wald
Life of this patent
Estimating the term…
Abstract
Error correction through the use of on memory encoded error correction circuitry or parity checking circuitry allow for error correction in a read only memory (ROM) embedded dynamic random access memory (DRAM).
Claims21
A ROM embedded DRAM, comprising:
- a DRAM array having a first portion of ROM bits and a second portion of DRAM bits;
- and
- an error correction element containing encoded ROM bit data for each ROM bit.
A ROM embedded DRAM, comprising:
- a DRAM array having a first portion of ROM cells and a second portion of DRAM cells;
- and
- an error correction element containing encoded ROM cell data for a plurality of ROM cells of the first portion, the error correction element comprising a section of the first portion of ROM cells.
Dependencies are inferred from the claim text.