System, apparatus and method for predicting accesses to a memory

An apparatus comprising:

• a processor configured to execute program instructions and to process program data;
• a memory including said program instructions and said program data;
• and
• a memory processor that includes a speculator configured to receive an address said program instructions or said program data, said speculator comprising
• a sequential predictor for generating a number of sequential addresses, said number having a first magnitude if said address contains instructions and a second magnitude if said address contains data, and
• a nonsequential predictor configured to associate a subset of addresses to said address and to predict a group of addresses based on at least one address of said subset, wherein said at least one address of said subset is nonsequential to said address.

A method of predicting addresses of a memory comprising:

• detecting an address from a stream of addresses;
• suppressing the prediction of one address as a next address;
• and
• generating one or more addresses to predict said next address based on said address, wherein at least one of said one or more addresses is nonsequential to said address.