Circuit and method to provide configuration of serial ATA queue depth versus number of devices
AssigneeLSI Corporation
InventorsPatrick Bashford, Brian Day, Jeffrey Rogers
Life of this patent
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AssigneeLSI Corporation
InventorsPatrick Bashford, Brian Day, Jeffrey Rogers
Estimating the term…
Disclosed is a system using a SAS host controller and SAS expanders to control multiple SATA end devices where the memory contained on the SAS host controller is fixed to ease the cost and power consumption of the SAS host controller device, but where there is an expanded ability to support additional SATA end devices by configuring the allowed native command queue depth to be smaller for each SATA end device, thus allowing more SATA end devices to be supported by a single SAS host controller. An embodiment of the invention has three possible preset configuration states: thirty-two SATA end devices with a native command queue depth of thirty-two; sixty-four SATA end devices with a native command queue depth of sixteen; and one-hundred-twenty-eight SATA end devices with a native command queue depth of eight.
A method of using a SAS host controller having a predetermined amount of memory and predetermined computational resources to manage a plurality of SATA end devices comprising:
A SAS host controller device that controls a plurality of SATA end devices comprising:
Dependencies are inferred from the claim text.