Semiconductor device and method for fabricating the same
AssigneeDongbuAnam Semiconductor Inc.
InventorJin Hyo Jung
Life of this patent
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Abstract
A semiconductor device and a method for fabricating the same may improve the isolation characteristics without deterioration of the junction diode characteristics and an increase in a threshold voltage of a MOS transistor. The device includes a semiconductor substrate; an STI layer in a predetermined portion of the semiconductor substrate, dividing the semiconductor substrate into an active region and a field region; and a field channel stop ion implantation layer in the semiconductor substrate under the STI layer.
Claims20
A semiconductor device comprising:
- a semiconductor substrate;
- an STI layer in a predetermined portion of the semiconductor substrate, dividing the semiconductor substrate into an active region and a field region;
- and
- a field channel stop ion implantation layer in the semiconductor substrate under the STI layer.
A semiconductor device comprising:
- a semiconductor substrate;
- p-type and n-type wells in the semiconductor substrate;
- an STI layer in a predetermined portion of the semiconductor substrate, separating the p-type and n-type wells and dividing the substrate into an active region and a field region;
- a first field channel stop ion implantation layer in the p-type well and under the STI layer;
- a second field channel stop ion implantation layer in the n-type well under the STI layer;
- n-type impurity ion areas in the active region of the p-type well;
- and
- p-type impurity ion areas in the active region of the n-type well.
A method for fabricating a semiconductor device comprising:
- implanting ions at a predetermined depth in a semiconductor substrate having an insulating mask pattern thereon, the insulating mask pattern defining an active region and a field region in the semiconductor substrate, to form a field channel stop ion implantation layer;
- and
- etching the semiconductor substrate having the insulating mask pattern thereon to form a trench and expose the field channel stop ion implantation layer.
A method for fabricating a semiconductor device comprising:
- defining active regions and field regions in a semiconductor substrate;
- forming an insulating pattern on the active regions of the semiconductor substrate;
- forming spacers at both sides of the insulating pattern;
- forming a first field channel stop ion implantation layer at a first predetermined depth in the semiconductor substrate using the insulating pattern and the spacers as a mask;
- forming a second field channel stop ion implantation layer at a second predetermined depth in the semiconductor substrate using the insulating pattern and the spacers as a mask;
- removing the spacers;
- etching the semiconductor substrate to form a trench and expose the first and second field channel stop ion implantation layers using the insulating pattern as a mask;
- forming an STI layer by gap-filling the trench with an STI insulator and planarizing the STI insulator;
- and
- forming p-type and n-type wells by respectively implanting impurity ions into different active regions of the substrate.
Dependencies are inferred from the claim text.