Pt/PGO etching process for FeRAM applications

A method of etching a platinum top electrode on a PGO ferroelectric layer while preserving the ferroelectric properties of the PGO ferroelectric layer and removing etching residue during fabrication of a semiconductor device, comprising:

• preparing a substrate;
• depositing a barrier layer on the substrate;
• depositing an iridium bottom electrode layer on the barrier layer;
• depositing a PGO ferroelectric layer on the iridium bottom electrode layer;
• depositing a platinum top electrode layer on the PGO ferroelectric layer;
• depositing an adhesion layer on the platinum top electrode layer;
• depositing a hard mask layer on the adhesion layer;
• applying photoresist to the hard mask layer, and patterning and developing the photoresist;
• patterning the hard mask;
• etching the noble metal top electrode layer in an initial etching step at a substrate RF bias power of between about 10 W to 1000 W, which produces etching residue;
• and
• over etching the noble metal top electrode layer and ferroelectric layer at an RF bias power in a range of between about 5 W to 150 W to remove etching residue from the initial etching step.