Emission display

An emissive display device having a first side and second side for producing images, comprising:

• a) a substrate having a first surface;
• b) a plurality of first pixels each having an emissive area wherein the plurality of first pixels define a first viewing region, wherein each first pixel produces light emission which is visible when viewing the first side of the display device;
• c) a plurality of second pixels each having an emissive area and wherein the plurality of second pixels define a second viewing region, wherein each second pixel produces light emission which is visible when viewing the second side of the display device, wherein at least a portion of the plurality of first and second pixels are interleaved;
• d) first means disposed relative to the first pixels for directing light emission produced by the first pixels outwardly from the first side of the display while preventing light emission through the second side of the display;
• e) second means disposed relative to the second pixels for directing light emission produced by second pixels outwardly from the second side of the display while preventing light emission through the first side of the display;
• and
• f) driving circuitry for activating the first and second pixels and wherein each of the one or more first pixels and each of the one or more second pixels further includes at least one electroluminescent layer disposed between a first electrode and a second electrode and wherein the driving circuitry further comprises;
• i) at least a first power line and a second power line;
• ii) one or more data lines;
• iii) at least one first power transistor electrically connected between the first power line and the first electrode of one of the one or more first pixels to regulate the current flow between the first power line and the first electrode of the one of the one or more first pixels;
• iv) at least one second power transistor electrically connected between the second power line and the first electrode of one of the one or more second pixels to regulate the current flow between the second power line and the first electrode of the one of the one or more second pixels;
• and
• v) at least one select transistor electrically connected so as to permit a voltage or current signal from at least one of the one or more data lines to adjust the current flow through the at least one first power transistor and the current flow through the at least one second power transistor.

An emissive display device having a first side and second side for producing images, comprising:

• a) a substrate having a first surface;
• b) a plurality of first pixels each having an emissive area wherein the plurality of first pixels define a first viewing region, wherein each first pixel produces light emission which is visible when viewing the first side of the display device;
• c) a plurality of second pixels each having an emissive area and wherein the plurality of second pixels define a second viewing region, wherein each second pixel produces light emission which is visible when viewing the second side of the display device, wherein at least a portion of the plurality of first and second pixels are interleaved;
• d) first means disposed relative to the first pixels for directing light emission produced by the first pixels outwardly from the first side of the display while preventing light emission through the second side of the display;
• e) second means disposed relative to the second pixels for directing fight emission produced by second pixels outwardly from the second side of the display while preventing light emission through the first side of the display;
• and
• f) driving circuitry for activating the first and second pixels and wherein one or more of the first pixels and one or more of the second pixels further includes at least one electroluminescent layer disposed between a first electrode and a second electrode and wherein the driving circuitry further comprises;
• (i) one or more first power lines;
• (ii) one or more second power lines;
• (iii) one or more data lines;
• (iv) one or more select lines;
• (v) a first power transistor having a terminal electrically connected to the first electrode of a first pixel, and a terminal electrically connected to a first power line, and a gate terminal;
• (vi) a second power transistor having a terminal electrically connected to the first electrode a second pixel, and a terminal electrically connected to a second power line and a gate terminal;
• (vii) a storage capacitor electrically connected to the gate of the first power transistor and to the gate of the second power transistor;
• and
• (viii) a select transistor having a terminal electrically connected to a data line and having a terminal electrically connected to the storage capacitor and electrically connected to the gate of the first power transistor and electrically connected to the gate of the second power transistor, and having gate terminal electrically connected to a select line.