US 2006/0038593 A1 · Semiconductor integrated circuit

Abstract

Disclosed is a semiconductor integrated circuit that comprises first and second transmission systems receiving in common an input signal supplied to a signal input terminal and having substantially identical logic configuration to each other, each comprising a plurality of transistors; and an output select unit. Transistors constituting said first transmission system comprise transistors having relatively high threshold values and being turned off and transistors having relatively low threshold values and being turned on, when the input signal supplied to said first transmission system takes a first value; and transistors constituting said second transmission system, comprise transistors having relatively high threshold values and being turned off and transistors have relatively low threshold values and being turned on, when an input signal supplied to said second transmission system assumes a second value. Each of the first and second transmission systems receives a control signal and is set to an active state and a standby mode based on the control signal. The output select unit, receiving outputs from said first and second transmission systems, outputs from an output terminal thereof an output of the transmission system where the relatively low threshold transistors are in an on-state, in active state, and said output select unit cuts off an output of the transmission system with an unstable output and outputs from said output terminal an output of the transmission system with a stable output, in a standby mode.

Claims13

Dependent claims

A semiconductor integrated circuit comprising:

first and second transmission systems, having input ends thereof connected in common to a signal input terminal for receiving an input signal, each including a plurality of transistors and having substantially identical logic configuration;
and
an output select unit, receiving outputs from said first and second transmission systems, for selecting an output;
wherein
said plurality of transistors constituting said first transmission system comprise transistors having relatively high threshold values and being turned off and transistors having relatively low threshold values and being turned on, when the input signal supplied to said first transmission system assumes a first value;
and
said plurality of transistors constituting said second transmission system, comprise transistors having relatively high threshold values and being turned off and transistors have relatively low threshold values and being turned on, when an input signal supplied to said second transmission system assumes a second value;
said first and second transmission systems being set to an operation mode and to a standby mode, responsive to a control signal received;
and wherein
said output select unit outputs from an output terminal thereof an output of the transmission system where the relatively low threshold transistors are in an on-state, when said first and second transmission systems are in the operation mode, and
said output select unit cuts off an output of the transmission system with an unstable output and outputs from said output terminal an output of the transmission system with a stable output, when said first and second transmission systems are in the standby mode.

8 more elements

A semiconductor integrated circuit comprising first and second transmission systems having input ends connected in common to a signal input terminal;

wherein
said first transmission system includes:
an odd-number stage circuit comprising a transistor of a first conductivity-type with a relatively low threshold value and a transistor of a second conductivity-type with a relatively high threshold value, each of said transistors having a control electrode connected in common to said input end or an output of the preceding stage circuit 10 and having respective second and first electrodes connected in common to an output end;
and
an even-number stage circuit comprising a transistor of a first conductivity-type with a relatively high threshold value and a transistor of a second conductivity-type with a relatively low threshold value, each of said transistors having a control electrode connected in common to said input end or an output of the preceding stage circuit and having respective second and first electrodes connected in common to an output end;
wherein
said second transmission system includes:
an odd-number stage circuit comprising a transistor of a first conductivity-type with a relatively high threshold value and a transistor of a second conductivity-type with a relatively low threshold value, each of said transistors having a control electrode connected in common to said input end or an output of the preceding stage circuit and having respective second and first electrodes connected in common to an output end;
and
an even-number stage circuit comprising a transistor of a first conductivity-type with a relatively low threshold value and a transistor of a second conductivity-type with a relatively high threshold value, each of said transistors having a control electrode connected in common to said input end or an output of the preceding stage circuit and having respective second and first electrodes connected in common to an output end;
and wherein
the second electrodes of said transistors of the first conductivity-type with relatively low threshold values in said first and second transmission systems are connected in common to said first power supply via a first switch on/off controlled by a signal supplied to a control terminal thereof;
the second electrodes of said transistors of the second conductivity-type with relatively low threshold values in said first and second transmission systems are connected in common to said second power supply via a second switch on/off controlled by a signal supplied to a control terminal thereof;
the second electrodes of said transistors of the first conductivity-type with relatively high threshold values in said first and second transmission systems are connected to said first power supply;
and
the second electrodes of said transistors of the second conductivity-type with relatively high threshold values in said first and second transmission systems are connected to said second power supply;
said semiconductor integrated circuit further comprising:
a third switch connected between the output end of said first transmission system and an output terminal, and on/off controlled by a signal supplied to a control terminal thereof;
a fourth switch connected between the output end of said second transmission system and the output terminal, and on/off controlled by a signal supplied to a control terminal thereof;
a first circuit, connected to output ends of said first and second transmission systems, outputting an output value corresponding to the values of the output ends of said first and second transmission systems and setting an output end thereof into a floating state, when values of the output ends of said first and second transmission systems are identical and are different, respectively;
and
a flip-flop circuit having an input end connected to an output of said first circuit, holding and outputting the value immediately before when the output of said first circuit is in a floating state, an output of said flip-flop circuit supplied to a control terminal of said third and fourth switches.

19 more elements

A semiconductor integrated circuit comprising first and second transmission systems having input ends connected in common to a signal input terminal;

wherein
said first transmission system includes:
an odd-number stage circuit comprising a transistor of a first conductivity-type with a relatively low threshold value and a transistor of a second conductivity-type with a relatively high threshold value, each of said transistors having a control electrode connected in common to said input end or an output of the preceding stage circuit and having respective second and first electrodes connected in common to an output end;
and
an even-number stage circuit comprising a transistor of a first conductivity-type with a relatively high threshold value and a transistor of a second conductivity-type with a relatively low threshold value, each of said transistors having a control electrode connected in common to said input end or an output of the preceding stage circuit and having respective second and first electrodes connected in common to an output end;
and wherein
said second transmission system includes:
an odd-number stage circuit comprising a transistor of a first conductivity-type with a relatively high threshold value and a transistor of a second conductivity-type with a relatively low threshold value, each of said transistors having a control electrode connected in common to said input end or an output of the preceding stage circuit and having respective second and first electrodes connected in common to an output end;
and
an even-number stage circuit comprising a transistor of a first conductivity-type with a relatively low threshold value and a transistor of a second conductivity-type with a relatively high threshold value, each of said transistors having a control electrode connected in common to said input end or an output of the preceding stage circuit and having respective second and first electrodes connected in common to an output end;
said semiconductor integrated circuit further comprising:
a first switch connected between an output end of said first transmission system and an output terminal, and on/off controlled by a signal supplied to a control terminal thereof;
a second switch connected between an output end of said second transmission system and said output terminal, and on/off controlled by a signal supplied to a control terminal thereof;
a third switch connected between said signal input terminal and the input end of said first transmission system, and controlled to be in an off-state when a control signal received indicates a standby mode;
a fourth switch connected between said signal input terminal and the input end of said second transmission system, and having an output end set to be in an off-state when said control signal received indicates a standby mode;
a fifth switch connected between the input end of said first transmission system and one of first and second power supplies, and set to be in an on-state when said control signal received indicates a standby mode;
a sixth switch connected between the input end of said second transmission system and the other of said first and second power supplies, and set to be in an on-state when said control signal received indicates a standby mode;
a first control circuit, set to an active state, when said control signal indicates an operation mode to be connected to the output ends of said first and second transmission systems, outputting a logic value corresponding to the values of the output ends of said first and second transmission systems and setting an output thereof into a floating state, when values of the output ends of said first and second transmission systems are identical and are different, said first control circuit set to an inactive state when said control signal indicates a standby mode;
an inverter circuit having an input end for receiving an output of said first circuit;
a second circuit, connected to the output ends of said first and second transmission systems, and set to an active state when said control signal indicates the standby mode, for supplying to the input end of said inverter circuit a logic value corresponding to output values of said first and second transmission systems, when the output values of said first and second transmission systems are at the same level, and for holding the input end of said inverter circuit at said set logic value when output values of said first and second transmission systems are different, said second circuit set to an inactive state when said control signal indicates the operation mode,
an output of said inverter circuit being connected to control terminals of said first and second switches.

18 more elements

Dependencies are inferred from the claim text.

Semiconductor integrated circuit

Life of this patent

Semiconductor integrated circuit

Life of this patent

Abstract

Claims13