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US 2006/0038583 A1Published application
Dynamic on-die termination management
AssigneeIntel Corporation
InventorKok Lim
Life of this patent
Estimating the term…
Abstract
A dynamic on-die termination circuit for a read-only node is disclosed herein.
Claims23
An apparatus comprising:
- an on-die termination circuit having a first and a second state, adapted to provide a termination impedance to a read-only node while in the first state;
- and
- a termination control circuit coupled to the on-die termination circuit and adapted to facilitate the on-die termination circuit in entering into the first state upon an occurrence of a first condition and the second state upon an occurrence of a second condition.
A method comprising:
- operating a memory controller adapted to transmit data to and from an external memory through an input/output interface;
- and
- controlling an on-die termination circuit to be in a first state to provide a termination impedance to a read-only node of the input/output interface, said controlling done upon the occurrence of a first condition.
A system comprising:
- a processing node, having
- an on-die termination circuit with a first and a second state, adapted to provide a termination impedance to a read-only node while in the first state, and
- a termination control circuit coupled to the on-die termination circuit and adapted to facilitate the on-die termination circuit in entering into the first state upon an occurrence of a first condition and the second state upon an occurrence of a second condition;
- and
- an external memory, coupled to receive an asserted read signal from the processing node and adapted to transmit data over a bus coupled to the read-only node in response the asserted read signal.
2 more elements
Dependencies are inferred from the claim text.