Automatic synchronization of I/O devices

A memory medium which stores program instructions for automatic synchronization of I/O devices, wherein the program instructions are executable by a processor to implement:

• a graphical program, wherein the graphical program specifies configuration and operation of a plurality of timed circuits comprised on one or more I/O devices;
• wherein the program instructions are further executable to implement:
• executing the graphical program to perform an I/O operation using the one or more I/O devices, wherein said executing comprises invoking software to perform:
• analyzing the plurality of timed circuits to determine timing and triggering information for operation of the plurality of timed circuits;
• configuring the timed circuits in accordance with the timing and triggering information;
• and
• operating the configured plurality of timed circuits to perform the I/O operation.

A system for automatic synchronization of I/O devices, comprising:

• a computer system, comprising:
• a processor;
• and
• a memory medium coupled to the processor;
• one or more I/O devices coupled to the processor and memory medium;
• wherein the memory medium stores a graphical program, wherein the graphical program specifies configuration and operation of a plurality of timed circuits comprised on the one or more I/O devices, and wherein the graphical program is executable to perform an I/O operation using the one or more I/O devices;
• wherein, in being executable, the graphical program is executable to invoke software to perform:
• analyzing the plurality of timed circuits to determine timing and triggering information for operation of the plurality of timed circuits;
• configuring the timed circuits in accordance with the timing and triggering information;
• and
• operating the configured plurality of timed circuits to perform the I/O operation.

A method for automatic synchronization of I/O devices, comprising:

• creating a graphical program, wherein the graphical program specifies configuration and operation of a plurality of timed circuits comprised on one or more I/O devices;
• executing the graphical program to perform an I/O operation using the one or more I/O devices, wherein said executing comprises invoking software to perform:
• determining the plurality of timed circuits, wherein each of the plurality of timed circuits comprises one of:
• an input circuit comprising one or more input channels, wherein the input circuit is operable to read data from the one or more input channels and provide the data to the graphical program;
• and
• an output circuit comprising one or more output channels, wherein the output circuit is operable to receive data from the graphical program and write the data to the one or more output channels;
• determining the number and types of timing signals for each of the plurality of timed circuits;
• determining sharing of the multiplicity of timing signals in order to synchronize the timed circuits;
• determining sources of timing signals for each of the plurality of timed circuits;
• determining timing signal routes from each of the sources to the plurality of timed circuits;
• determining a starting order of the plurality of timed circuits;
• initiating operation of each of the plurality of timed circuits in accordance with the determined starting order;
• determining a stopping order of the plurality of timed circuits;
• and
• terminating operation of each of the plurality of timed circuits in accordance with the determined stopping order.