Thin film transistor device and method of manufacturing the same
AssigneeFujitsu Display Technologies Corporation
InventorKazushige Hotta
Life of this patent
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Abstract
A first insulating film is formed. Then, a gate electrode of a low voltage drive thin film transistor and a mask film for covering a region constituting a channel of a high voltage drive thin film transistor are formed with a molybdenum film on the first insulating film. An impurity is implanted into a semiconductor film while using the gate electrode and the mask film as a mask, thereby forming a high density impurity region. Thereafter, the impurity is activated by performing a thermal process under a condition at 500° C. and for 2 hours, for example. Subsequently, the mask film is removed and a second insulating film is formed. A gate electrode of the high voltage drive thin film transistor is formed with an aluminum alloy on the second insulating film.
Claims18
A thin film transistor device comprising:
- a substrate;
- a first thin film transistor formed on the substrate and applying a first insulating film as a gate insulating film;
- and
- a second thin film transistor formed on the substrate and applying a laminated film of the first insulating film and a second insulating film as a gate insulating film,
- wherein a gate electrode of the second thin film transistor is made of a conductive material having lower resistance and a lower melting point than a gate electrode of the first thin film transistor.
A thin film transistor device comprising:
- a substrate;
- a first n-type thin film transistor and a first p-type thin film transistor each of which is formed on the substrate and applying a first insulating film as a gate insulating film;
- and
- a second n-type thin film transistor and a second p-type thin film transistor each of which is formed on the substrate and applying a laminated film of the first insulating film and a second insulating film as a gate insulating film,
- wherein a gate electrode of each of the second n-type thin film transistor and the second p-type thin film transistor is made of a conductive material having lower resistance and a lower melting point than a gate electrode of each of the first n-type thin film transistor and the first p-type thin film transistor.
A method of manufacturing a thin film transistor device comprising:
- a first step of forming a semiconductor film on a first thin film transistor forming region and a second thin film transistor forming region of a substrate;
- a second step of forming a first insulating film on an entire upper surface of the substrate;
- a third step of forming a first metallic film on the first insulating film;
- a fourth step of forming a first gate electrode in the first thin film transistor forming region and forming a mask film to cover at least a region constituting a channel on the second thin film transistor forming region by patterning the first metallic film;
- a fifth step of forming an impurity region constituting a source and a drain by implanting an impurity into the semiconductor film in the first thin film transistor forming region and in the second thin film transistor forming region while using the first gate electrode and the mask film as a mask;
- a sixth step of removing the mask film;
- a seventh step of forming a second insulating film on the entire upper surface of the substrate;
- an eighth step of forming a second metallic film made of metal having lower resistance and a lower melting point as compared to the first metallic film onto the second insulating film;
- and
- a ninth step of forming a second gate electrode in the second thin film transistor forming region by patterning the second metallic film,
- wherein a thermal process for activating the impurities implanted into the semiconductor film is performed at a lower temperature than a melting point of the metal constituting the first metallic film in mid-course from completion of the fifth step to initiation of the eighth step.
A method of manufacturing a thin film transistor device comprising:
- a first step of forming a semiconductor film on a first thin film transistor forming region and a second thin film transistor forming region of a substrate;
- a second step of forming a first insulating film on an entire upper surface of the substrate;
- a third step of forming a first metallic film on the first insulating film;
- a fourth step of forming a first gate electrode in the first thin film transistor forming region and forming a mask film to cover at least a region constituting a channel on the second thin film transistor forming region by patterning the first metallic film;
- a fifth step of forming a low density impurity region by implanting an impurity into the semiconductor film in the first thin film transistor forming region and in the second thin film transistor forming region while using the first gate electrode and the mask film as a mask;
- a sixth step of forming a resist film to cover the mask film and the vicinity of the mask film;
- a seventh step of forming a high density impurity region having higher impurity density than the low density impurity region by implanting an impurity into the semiconductor film in the first thin film transistor forming region and in the second thin film transistor forming region while using the first gate electrode and the resist film as a mask;
- an eighth step of removing the resist film;
- a ninth step of removing the mask film;
- a tenth step of forming a second insulating film on the entire upper surface of the substrate;
- an eleventh step of forming a second metallic film made of metal having lower resistance and a lower melting point as compared to the first metallic film onto the second insulating film;
- and
- a twelfth step of forming a second gate electrode in the second thin film transistor forming region by patterning the second metallic film,
- wherein a thermal process for activating the impurities implanted into the semiconductor film is performed at a lower temperature than a melting point of the metal constituting the first metallic film in mid-course from completion of the eighth step to initiation of the eleventh step.
A method of manufacturing a thin film transistor device comprising:
- a first step of forming a semiconductor film on a first thin film transistor forming region and a second thin film transistor forming region of a substrate;
- a second step of forming a first insulating film on an entire upper surface of the substrate;
- a third step of forming a resist film in each region constituting a channel in the first thin film transistor forming region and in the second thin film transistor forming region by a photoresist method;
- a fourth step of forming a low density impurity region by implanting an impurity into the semiconductor film in the first thin film transistor forming region and in the second thin film transistor forming region while using the resist film as a mask;
- a fifth step of removing the resist film;
- a sixth step of forming a first metallic film on the first insulating film;
- a seventh step of forming a first gate electrode in the first thin film transistor forming region and forming a mask film covering part of a region constituting a lightly doped drain and the region constituting the channel of the second thin film transistor forming region by patterning the first metallic film,
- an eighth step of forming a high density impurity region having higher impurity density than the low density impurity region by implanting an impurity into the semiconductor film in the first thin film transistor forming region and in the second thin film transistor forming region while using the first gate electrode and the mask film as a mask;
- a ninth step of removing the mask film;
- a tenth step of forming a second insulating film on the entire upper surface of the substrate;
- an eleventh step of forming a second metallic film made of metal having lower resistance and a lower melting point as compared to the first metallic film onto the second insulating film;
- and
- a twelfth step of forming a second gate electrode in the second thin film transistor forming region by patterning the second metallic film,
- wherein a thermal process for activating the impurities implanted into the semiconductor film is performed at a lower temperature than a melting point of the metal constituting the first metallic film in mid-course from completion of the eighth step to initiation of the eleventh step.
A method of manufacturing a thin film transistor device comprising:
- a first step of forming a semiconductor film on a first thin film transistor forming region and a second thin film transistor forming region of a substrate;
- a second step of forming a first insulating film on an entire upper surface of the substrate;
- a third step of forming a first metallic film on the first insulating film;
- a fourth step of forming a first gate electrode in the first thin film transistor forming region and forming a mask film covering a region constituting a channel and a region constituting a lightly doped drain of the second thin film transistor forming region by patterning the first metallic film,
- a fifth step of forming a high density impurity region constituting a source and a drain by implanting an impurity into the semiconductor film in the first thin film transistor forming region and in the second thin film transistor forming region while using the first insulating film and the mask film as a mask;
- a sixth step of removing the mask film;
- a seventh step of forming a second insulating film on the entire upper surface of the substrate;
- an eighth step of forming a second metallic film made of metal having lower resistance and a lower melting point as compared to the first metallic film onto the second insulating film;
- a ninth step of forming a second gate electrode in the second thin film transistor forming region by patterning the second metallic film;
- and
- a tenth step of forming a low density impurity region having lower impurity density than the high density impurity region between the region constituting the channel and the high density impurity region in the second thin film transistor forming region by implanting an impurity into the semiconductor film in the second thin film transistor forming region while using the second gate electrode as a mask,
- wherein a thermal process for activating the impurity implanted into the semiconductor film is performed at a lower temperature than a melting point of the metal constituting the first metallic film in mid-course from completion of the fifth step to initiation of the eighth step.
A method of manufacturing a thin film transistor device comprising:
- a first step of forming a semiconductor film on a first n-type thin film transistor forming region, a first p-type thin film transistor forming region, a second n-type thin film transistor forming region, and a second p-type thin film transistor forming region of a substrate;
- a second step of forming a first insulating film on an entire upper surface of the substrate;
- a third step of forming a first metallic film on the first insulating film;
- a fourth step of forming a first gate electrode in the first n-type thin film transistor forming region and in the first p-type thin film transistor forming region and forming a mask film to cover at least a region constituting a channel on the second n-type thin film transistor forming region and on the second p-type thin film transistor forming region by patterning the first metallic film;
- a fifth step of forming an n-type low density impurity region by implanting an n-type impurity into the semiconductor film in the first n-type thin film transistor forming region, the first p-type thin film transistor forming region, the second n-type thin film transistor forming region, and the second p-type thin film transistor forming region while using the first gate electrode and the mask film as a mask;
- a sixth step of forming a first resist film covering the mask film in the second n-type thin film transistor forming region and a region in the vicinity thereof, the first resist film entirely covering the first p-type thin film transistor forming region and entirely covering the second p-type thin film transistor forming region;
- a seventh step of forming an n-type high density impurity region having higher impurity density than the n-type low density impurity region by implanting an n-type impurity into the semiconductor film in the first n-type thin film transistor forming region and in the second n-type thin film transistor forming region while using the first gate electrode and the first resist film as a mask;
- an eighth step of removing the first resist film;
- a ninth step of forming a second resist film entirely covering the first n-type thin film transistor forming region and entirely covering the second n-type thin film transistor forming region;
- a tenth step of forming a p-type high density impurity region constituting a source and a drain by implanting a p-type impurity into the semiconductor film in the first p-type thin film transistor forming region and in the second p-type thin film transistor forming region while using the first gate electrode and the second resist film as a mask;
- an eleventh step of removing the second resist film;
- a twelfth step of removing the mask film in the second n-type thin film transistor forming region and in the second p-type thin film transistor forming region;
- a thirteenth step of forming a second insulating film on the entire upper surface of the substrate;
- a fourteenth step of forming a second metallic film made of metal having lower resistance and a lower melting point as compared to the first metallic film onto the second insulating film;
- and
- a fifteenth step of forming a second gate electrode in the second n-type thin film transistor forming region and in the second p-type thin film transistor forming region by patterning the second metallic film,
- wherein a thermal process for activating the impurities implanted into the semiconductor film is performed at a lower temperature than a melting point of the metal constituting the first metallic film in mid-course from completion of the eleventh step to initiation of the fourteenth step.
A method of manufacturing a thin film transistor device comprising:
- a first step of forming a semiconductor film on a first n-type thin film transistor forming region, a first p-type thin film transistor forming region, a second n-type thin film transistor forming region, and a second p-type thin film transistor forming region of a substrate;
- a second step of forming a first insulating film on an entire upper surface of the substrate;
- a third step of forming a resist film covering regions constituting channels of the first n-type thin film transistor forming region and of the second n-type thin film transistor forming region, and entirely covering the first p-type thin film transistor forming region and the second p-type thin film transistor forming region by use of a photoresist method;
- a fourth step of forming an n-type low density impurity region by implanting an n-type impurity into the semiconductor film in the first n-type thin film transistor forming region and in the second n-type thin film transistor forming region while using the resist film as a mask;
- a fifth step of removing the resist film;
- a sixth step of forming a first metallic film on the first insulating film;
- a seventh step of forming a first gate electrode in the first p-type thin film transistor forming region and forming a first mask film for covering a region constituting a channel in the second p-type thin film transistor forming region by patterning the first metallic film in the first p-type thin film transistor forming region and in the second p-type thin film transistor forming region;
- an eighth step of forming a p-type high density impurity region constituting a source and a drain by implanting a p-type impurity into the semiconductor film in the first p-type thin film transistor forming region and in the second p-type thin film transistor forming region while using the first gate electrode and the first mask film as a mask;
- a ninth step of forming a second gate electrode in the first n-type thin film transistor forming region and forming a second mask film covering part of a region constituting a lightly doped drain and the region constituting the channel of the second n-type thin film transistor forming region by patterning the first metal film in the first n-type thin film transistor forming region and in the second n-type thin film transistor forming region;
- a tenth step of forming an n-type high density impurity region having higher impurity density than the n-type low density impurity region by implanting an n-type impurity into the semiconductor film in the first n-type thin film transistor forming region and the second n-type thin film transistor forming region while using the second gate electrode and the second mask film as a mask;
- an eleventh step of removing the first and second mask films in the second n-type thin film transistor forming region and in the second p-type thin film transistor forming region;
- a twelfth step of forming a second insulating film on the entire upper surface of the substrate;
- a thirteenth step of forming a second metallic film made of metal having lower resistance and a lower melting point as compared to the first metallic film onto the second insulating film;
- and
- a fourteenth step of forming a third gate electrode in the second n-type thin film transistor forming region and forming a fourth gate electrode in the second p-type thin film transistor forming region by patterning the second metallic film,
- wherein a thermal process for activating the impurities implanted into the semiconductor film is performed at a lower temperature than a melting point of the metal constituting the first metallic film in mid-course from completion of the tenth step to initiation of the thirteenth step.
A method of manufacturing a thin film transistor device comprising:
- a first step of forming a semiconductor film on a first n-type thin film transistor forming region, a first p-type thin film transistor forming region, a second n-type thin film transistor forming region, and a second p-type thin film transistor forming region of a substrate;
- a second step of forming a first insulating film on an entire upper surface of the substrate;
- a third step of forming a first metallic film on the first insulating film;
- a fourth step of forming a first gate electrode in the first p-type thin film transistor forming region and forming a first mask film to cover a region constituting a channel of the second p-type thin film transistor forming region by patterning the first metallic film in the first p-type thin film transistor forming region and in the second p-type thin film transistor forming region;
- a fifth step of forming a p-type high density impurity region constituting a source and a drain by implanting a p-type impurity into the semiconductor film in the first p-type thin film transistor forming region and in the second p-type thin film transistor forming region while using the first gate electrode and the first mask film as a mask;
- a sixth step of forming a second gate electrode in the first n-type thin film transistor forming region by patterning the first metallic film in the first n-type thin film transistor forming region and in the second n-type thin film transistor forming region and forming a second mask film covering a region constituting a lightly doped drain and a region constituting a channel of the second n-type thin film transistor forming region;
- a seventh step of forming an n-type high density impurity region constituting a source and a drain by implanting an n-type impurity into the semiconductor film in the first n-type thin film transistor forming region and in the second n-type thin film transistor forming region while using the second gate electrode and the second mask film as a mask;
- an eighth step of removing the first and second mask films in the second n-type thin film transistor forming region and in the second p-type thin film transistor forming region;
- a ninth step of forming a second insulating film on the entire upper surface of the substrate;
- a tenth step of forming a second metallic film made of metal having lower resistance and a lower melting point as compared to the first metallic film onto the second insulating film;
- an eleventh step of forming a third gate electrode in the second n-type thin film transistor forming region and forming a fourth gate electrode in the second p-type thin film transistor forming region by patterning the second metallic film;
- and
- a twelfth step of forming an n-type low density impurity region having lower impurity density than the n-type high density impurity region between the region constituting the channel and the n-type high density impurity region by implanting an n-type impurity into the semiconductor film in the second n-type thin film transistor forming region while using the third gate electrode as a mask,
- wherein a thermal process for activating the impurities implanted into the semiconductor film is performed at a lower temperature than a melting point of the metal constituting the first metallic film in mid-course from completion of the seventh step to initiation of the tenth step.
Dependencies are inferred from the claim text.