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US 2006/0033159 A1Published application
Semiconductor integrated circuit device
AssigneeSeiko Instruments Inc.
InventorJun Osanai
Life of this patent
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Abstract
A MOS transistor for composing a multi-Vth device is provided by selectively arranging a nitride film to overlap with the gate electrode of the MOS transistor from the source, and by setting an overlap ratio of the nitride film width with respect to the gate electrode width to be variable in accordance with design values for patterns.
Claims5
A semiconductor integrated circuit device, comprising:
- a first MOS transistor in which a nitride film is arranged to overlap with a gate electrode of the first MOS transistor from a source thereof through an insulating film;
- and
- a second MOS transistor in which a nitride film does not overlap with a gate electrode of the second MOS transistor from a source thereof.
Dependencies are inferred from the claim text.