Method of manufacturing a semiconductor device having trenches for isolation and capacitor

A semiconductor device comprising:

• semiconductor elements each having a gate insulating film;
• element isolation trenches for isolation between the semiconductor elements;
• capacitor formation trenches;
• and
• a capacitor dielectric film formed in the capacitor formation trenches,
• wherein the semiconductor elements are formed in a first well,
• wherein the capacitor formation trenches are formed in a second well,
• wherein the depth of the capacitor formation trenches is equal to the depth of the element isolation trenches, and
• wherein the capacitor dielectric film and the gate insulating film are formed of a same layer.

A semiconductor device comprising:

• semiconductor elements each having a gate electrode;
• element isolation trenches each for isolation between the semiconductor elements;
• capacitor formation trenches;
• and
• capacitor electrodes formed in the capacitor formation trenches,
• wherein the semiconductor elements are formed in a first well,
• wherein the capacitor formation trenches are formed in a second well,
• wherein the depth of the capacitor formation trenches is equal to the depth of the element isolation trenches, and
• wherein the capacitor electrodes and the gate electrodes are formed of a same layer.

A semiconductor device comprising:

• semiconductor elements formed in a first well;
• memory cells formed in a third well;
• capacitor elements formed in a second well;
• and
• element isolation trenches each for isolation between the semiconductor elements,
• wherein each semiconductor element has a first insulating film and a first conductive film formed over the first insulating film,
• wherein each memory cell has an electric charge storage layer, a second insulating film formed over the electric charge storage layer and a second conductive film formed over the second insulating film,
• wherein each capacitor element has capacitor formation trenches, the first insulating film formed in the capacitor formation trenches and the first conductive film formed over the first insulating film, and
• wherein the depth of the capacitor formation trenches is equal to the depth of the element isolation trenches.

A semiconductor device comprising:

• memory cells formed in a third well;
• capacitor elements formed in a second well;
• and
• element isolation trenches each for isolation between the memory cells,
• wherein each memory cell has an electric charge storage layer, a second insulating film formed over the electric charge storage layer and a second conductive film formed over the second insulating film,
• wherein each capacitor element has capacitor formation trenches and the second insulating film formed in the capacitor formation trenches, and
• wherein the depth of the capacitor formation trenches is equal to the depth of the element isolation trenches.

A semiconductor device comprising:

• memory cells formed in a third well;
• capacitor elements formed in a second well;
• and
• element isolation trenches each for isolation between the memory cells,
• wherein each memory cell has an electric charge storage layer and a second conductive film formed over the electric charge storage layer,
• wherein each capacitor element has capacitor formation trenches, and the electric charge storage layer formed in the capacitor formation trenches, and
• wherein the depth of the capacitor formation trenches is equal to the depth of the element isolation trenches.