A ferroelectric random access memory (FRAM), comprising:
- a semiconductor substrate;
- an interlayer insulating layer on the substrate;
- a diffusion preventive layer on the interlayer insulating layer, the diffusion preventive layer and the interlayer insulating layer having two node contact holes formed therein;
- node conductive layer patterns that are aligned with the node contact holes, respectively, and disposed so as to protrude upward from the diffusion preventive layer;
- and
- lower electrodes disposed on the diffusion preventive layer that cover the node conductive layer patterns, respectively;
- wherein thicknesses of the lower electrodes are gradually reduced from a line extending from upper surfaces of the node conductive layer patterns toward the diffusion preventive layer.