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US 2006/0033129 A1Published application
Low dark current image sensors with epitaxial SiC and/or carbonated channels for array transistors
AssigneeMicron Technology, Inc.
InventorChandra Mouli
Life of this patent
Estimating the term…
Abstract
A pixel cell having a substrate with a isolation channel formed of higher carbon concentrate such as SiC or carbonated silicon. The channel comprising SiC or carbonated silicon is provided over the substrate of the pixel cell to reduce the dark current leakage.
Claims55
A pixel cell comprising:
- a substrate;
- a photo-conversion device formed in said substrate;
- and
- an isolation channel layer disposed over said substrate.
1 more element
A pixel cell comprising:
- a substrate having a transistor region and a photo-conversion region;
- a photo-conversion device formed in the photo-conversion region of said substrate;
- and
- an isolation channel layer disposed over said transistor region.
1 more element
A pixel cell comprising:
- a substrate having a transistor region and a photo-conversion region wherein said transistor region has source and drain region;
- and
- an isolation channel layer disposed over said source and drain region of said transistor region.
A method of forming a pixel cell, the method comprising the steps of:
- forming a substrate;
- forming a nitride layer over said substrate at selected location to form an exposed pattern;
- and
- forming an isolation channel layer over the substrate at locations corresponding to said exposed pattern.
1 more element
A method of forming a pixel cell, the method comprising the steps of:
- forming a substrate;
- and
- forming a carbon rich isolation channel layer over the substrate.
A CMOS imager comprising:
- a pixel cell, comprising:
- a substrate surface;
- a photo-conversion device formed in said substrate;
- and
- an isolation channel layer disposed over said substrate.
2 more elements
A CMOS imager comprising:
- a pixel cell, comprising:
- a substrate having a transistor region and a photo-conversion region wherein said transistor region has source and drain region;
- and
- an isolation channel layer disposed over said source and drain region of said transistor region.
1 more element
Dependencies are inferred from the claim text.