Sign-sign least means square filter
AssigneeIntel Corporation
InventorsJames Jaussi, Bryan Casper, Ganesh Balamuragan, Stephen Mooney
Life of this patent
Estimating the term…
Loading patent…
AssigneeIntel Corporation
InventorsJames Jaussi, Bryan Casper, Ganesh Balamuragan, Stephen Mooney
Estimating the term…
In some embodiments, an adaptive filter employs two adaptation modes, where during one adaptation mode the adaptive filter is updated only when the received training sample is a first binary value and during the other adaptation mode the adaptive filter is updated only when the received sample is a second binary value. Each adaptation mode provides a set of filter weights, and these two sets of filter weights are averaged to provide an adapted set of filter weights. The use of two adaptation mode allows for a clock boundary in which the digital portion of the filter operates at a lower clock rate than the analog portion. In other embodiments, a filter architecture is described for providing the algebraic signs of the received data samples, important for sign-sign least means square filtering algorithms. In other embodiments, a filter architecture is described in which efficient use is made of voltage-to-current converters so as to achieve a high throughput rate during filtering. Embodiments of the present invention have application to channel equalization.
An circuit comprising:
A circuit comprising:
A communication system comprising:
A method to adapt a filter, the method comprising:
Dependencies are inferred from the claim text.