Shallow low energy ion implantation into pad oxide for improving threshold voltage stability

A method of forming a semiconductor device, the steps comprising:

• forming a silicon dioxide layer on a silicon substrate;
• forming a silicon nitride layer on said silicon dioxide layer;
• forming isolation trench regions in said silicon substrate and removing said silicon nitride;
• first implantation of As+ dopant through said silicon dioxide layer;
• second implantation of As+ dopant through said implanted silicon dioxide layer to form wells;
• and
• removing said implanted silicon dioxide layer and forming a gate dielectric layer over said silicon substrate.

A method of forming a semiconductor device with improved threshold voltage stability, the steps comprising:

• forming isolation trenches in a silicon substrate with steps comprising:
• forming silicon nitride over silicon dioxide stack on said silicon substrate;
• and selective removal of said silicon nitride;
• forming a sacrificial implanted silicon dioxide layer by implanting first As+ ions into said silicon dioxide layer;
• forming n-well in silicon substrate by second implantation of As+ ions;
• and
• removing said implanted silicon dioxide layer and forming a gate dielectric layer over said silicon substrate.