Integrated circuit structure with improved LDMOS design
AssigneeFairchild Semiconductor Corporation
InventorJun Cai
Life of this patent
Estimating the term…
Abstract
A semiconductor integrated circuit including an LDMOS device structure comprises a semiconductor layer with a pair of spaced-apart field effect gate structures over an upper surface of the semiconductor layer. First and second spaced-apart source regions of a first conductivity type are formed in a portion of the layer between the pair of gate structures with a first region of a second conductivity type formed there between. A lightly doped body region of a second conductivity type is formed in the semiconductor layer, extending from below the source regions to below the gate structures and extending a variable depth into the semiconductor layer. This body region is characterized by an inflection in depth in that portion of the body region extending below the first region.
Claims7
A method of forming a semiconductor device comprising:
- providing a layer of semiconductor material;
- forming with a first mask level a pair of spaced-apart field effect gate structures on a surface of a semiconductor layer, each structure including a first end portion facing the other gate structure;
- forming with a second mask level first and second spaced-apart source regions of a first conductivity type in the layer and between the pair of gate structures with a resulting region of the surface between the first and second spaced-apart source regions having a first area dimension;
- also forming with the second mask level a lightly doped body region of a second conductivity type in the layer and extending below the source regions;
- and
- forming a more heavily doped region of the second conductivity type in a portion of the semiconductor layer having a surface with the first area dimension, said portion having a surface with an area dimension smaller than the first area dimension.
Dependencies are inferred from the claim text.