Methods of forming integrated circuit devices having field effect transistors of different types in different device regions

A method of forming a semiconductor device, comprising:

• preparing a semiconductor substrate having a cell region and a peripheral circuit region;
• forming a trench isolation layer in a predetermined region of the semiconductor substrate to define a cell active region in the cell region and a peripheral active region in the peripheral circuit region, the cell active region having a width smaller than the peripheral active region;
• forming a mask layer on the trench isolation layer and the active regions;
• patterning the mask layer to form a cell gate opening on the cell active region;
• etching the trench isolation layer using the patterned mask layer as an etch mask to form a cell gate groove partially exposing sidewalls and an upper surface of the cell active region;
• forming an insulated cell gate electrode filling the cell gate groove;
• forming a cell gate protection layer on the cell gate electrode;
• etching the cell gate protection layer and the patterned mask layer to form a peripheral gate opening on the peripheral active region;
• and
• forming an insulated peripheral gate electrode in the peripheral gate opening.

A method of forming a semiconductor device, comprising:

• preparing a semiconductor substrate having a cell region and a peripheral circuit region;
• forming a trench isolation layer in a predetermined region of the semiconductor substrate to define a cell active region in the cell region and a peripheral active region in the peripheral circuit region, the cell active region having a width smaller than the peripheral active region;
• forming a mask layer on the trench isolation layer and the active regions;
• patterning the mask layer to form a cell gate opening on the cell active region;
• etching the cell active region using the patterned mask layer as an etch mask to form a cell gate groove which partially recesses the cell active region;
• forming an insulated cell gate electrode filling the cell gate groove;
• forming a cell gate protection layer on the cell gate electrode;
• etching the cell gate protection layer and the patterned mask layer to form a peripheral gate opening on the peripheral active region;
• and
• forming an insulated peripheral gate electrode in the peripheral gate opening.