Chip protection register unlocking

A non-volatile memory device comprising:

• a memory array with a plurality of non-volatile memory cells;
• a configuration register;
• one or more lock bits, wherein the data contents of the configuration register are rendered unwriteable by the programming of the one or more lock bits;
• and
• a lock bit erase circuit, wherein the lock bit erase circuit is coupled to the one or more lock bits and wherein the lock bit erase circuit is operable only when the non-volatile memory device is not in packaged form.

A configuration register comprising:

• one or more configuration register segments, each configuration register segment having an associated lock bit;
• a lock bit erase circuit coupled to each lock bit;
• a lock bit erase enable circuit;
• and
• an erase circuit coupled to the lock bit erase enable circuit and to each lock bit.

A memory device comprising:

• a memory array with a plurality of non-volatile memory cells;
• a means for storing configuration data;
• one or more means for locking the means for storing configuration data, wherein the data contents of the means for storing configuration data are rendered unwriteable by the programming of the one or more means for locking;
• and
• a means for erasing, wherein the means for erasing controls the erasing of the one or more means for locking and wherein the means for erasing is operable only when the memory device is in wafer form.