US 2005/0232218 A1 · Low-power operation of systems requiring low-latency and high-throughput

Abstract

A method and apparatus for providing multiple clock signals for a communication device, with the clock signals being generated to correspond to the operating mode of various core modules of the communication device. A clock generator is operable to generate a plurality of clock signals having performance characteristics corresponding to the operating mode of individual cores in the system. A clock management logic circuit is operable to receive a plurality of request signals from the core modules and to cause the clock generator to generate appropriate clock signals based on the requests and other information relating to the operating mode of the core modules.

Claims20

Dependent claims

A data processing system for enabling communication, comprising:

a plurality of core modules for processing data, wherein individual core modules in said plurality of core modules are operable to generate individual requests for clock signals corresponding to the operating mode of said individual core modules;
a clock generator operable to generate a plurality of clock signals having performance characteristics corresponding to said operating mode of individual cores in said plurality of core modules;
and
a clock management logic circuit operable to receive said individual requests from said individual core modules and to cause said clock generator to generate one of said plurality of clock signals based on said requests, wherein said generated clock signal corresponds to the highest operating mode of said individual core modules.

1 more element

Dependencies are inferred from the claim text.

Low-power operation of systems requiring low-latency and high-throughput

Life of this patent

Low-power operation of systems requiring low-latency and high-throughput

Life of this patent

Abstract

Claims20