Back to results
US 2005/0232012 A1Published application
NAND flash memory device and method of programming the same
AssigneeHynix Semiconductor Inc.
InventorJin Park
Life of this patent
Estimating the term…
Abstract
Provided is directed to a NAND flash memory device and a method of programming the same, which can improve integration of the device by removing a common source line connecting with a source line coupled to a plurality of cell blocks, control a voltage applied to a source line by each cell block, and rise a precharge level in a channel area by applying a pumping voltage to the source line relatively having low capacitance instead of a bitline having a large capacitance, and as a result of those, the NAND flash memory device can reduce disturbance, use a lower voltage than a power supply voltage on the bitline, which leads to reduce a current consumption.
Claims13
A NAND flash memory device, comprising:
- a plurality of cell blocks including a plurality of cell strings connected to a plurality of flash cells in series, and is erasing according to a predetermined command signal, or programming a predetermined a predetermined information on a selected flash cell, or reading the information of the selected cell;
- a plurality of source lines connected with the plurality of cell strings in the plurality of cell blocks respectively;
- and
- a source line selection unit for respectively applying a separate voltage to the plurality of source lines.
1 more element
A method of programming the NAND flash memory device, comprising steps of:
- providing a NAND flash memory device including a plurality of cell blocks including a plurality of cell strings connected with a plurality of cells in series, a plurality of string select transistors connected with a drain terminal of the cell string, and a plurality of source select transistors connected with a source terminal of the cell string, a string select line connected with a gate terminal and a plurality of bitlines respectively coupled to drain terminals of the plurality of string select transistors, a source select line connected with a gate terminal and a source line coupled to the source terminals of the plurality of source select transistors, a word line connected with each gate terminal of the plurality of cell gates in the plurality of cell strings, and a source line selection unit applying a predetermined voltage to the source line;
- applying a string voltage to the string select line, applying a ground power supply to the source select line;
- applying a ground voltage to the word line, applying a ground power supply to the selected bitline, applying a pass voltage to the deselected bitline, and finally applying a power supply voltage to the source line through the source line selection unit;
- and
- performing a program operation by applying a program voltage to the selected word line, and applying a by-pass voltage to the deselected word line.
2 more elements
A method of programming the NAND flash memory device, comprising the steps of:
- providing a NAND flash memory device including a plurality of cell blocks including a plurality of cell strings connected with a plurality of cells in series, a plurality of string select transistors connected with a drain terminal of the cell string, and a plurality of source select transistors connected with a source terminal of the cell string, a string select line connected with a gate terminal and a plurality of bitlines respectively coupled to drain terminals of the plurality of string select transistors, a source select line connected with a gate terminal and a source line coupled to the source terminals of the plurality of source select transistors, a word line connected with each gate terminal of the plurality of cell gates in the plurality of cell strings, and a source line selection unit applying a predetermined voltage to the source line;
- applying a ground voltage to the string select line, applying a pumping voltage to the source select line, applying a ground voltage to the selected bitline, applying a pass voltage to the deselected bitline, applying a program voltage to the selected word line, applying a by-pass voltage to the deselected word line, and finally applying a precharge voltage to the source line to the source line selection unit;
- applying a ground power supply to the source select line;
- and
- applying the pass voltage to the string select line.
2 more elements
A method of programming the NAND flash memory device, comprising the steps of:
- providing a NAND flash memory device including a plurality of cell blocks including a plurality of cell strings connected with a plurality of cell in series, a plurality of string select transistors connected with a drain terminal of the cell string, and a plurality of source select transistors connected with a source terminal of the cell string, a string select line connected with a gate terminal and a plurality of bitlines respectively coupled to drain terminals of the plurality of string select transistors, a source select line connected with a gate terminal and a source line coupled to the source terminals of the plurality of source select transistors, a word line connected with each gate terminal of the plurality of cell gates in the plurality of cell strings, and a source line selection unit applying a predetermined voltage to the source line;
- applying a ground voltage to the string select line, applying a pumping voltage to the source select line, applying a ground voltage to the selected bitline, applying a pass voltage to the deselected bitline, applying a ground voltage to the plurality of word lines, and applying a precharge voltage to the source line through the source line selection unit;
- applying a program voltage to the selected word line, and applying a by-pass voltage to the deselected word line;
- applying a ground voltage to the source select line;
- and
- applying the pass voltage to the string select line.
3 more elements
Dependencies are inferred from the claim text.