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US 2005/0231995 A1Published application
Nonvolatile ferroelectric memory device
AssigneeHynix Semiconductor Inc.
InventorHee Kang
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Abstract
A nonvolatile ferroelectric memory device comprises a cell array block, a sense amplifier unit, a main amplifier unit and a data bus unit. The ferroelectric sense amplifier effectively senses and amplifies cell data having a small voltage difference applied to a main bit line, thereby improving operation characteristics in a low voltage. Also, a sensing voltage of the main bit line is lowered, thereby reducing a cross talk noise effect between main bit lines
Claims17
A nonvolatile ferroelectric memory device comprising:
- a cell array block, comprising a cell array having a hierarchical bit line architecture for varying a voltage level of a corresponding main bit line depending on cell data applied to a sub bit line to induce a sensing voltage to the corresponding main bit line;
- a sense amplifier unit comprising a plurality of sense amplifiers each for sensing a sensing voltage of the main bit line and variably regulating the amount of sensing load depending on the sensed voltage level to firstly amplify the sensing voltage and secondly amplify the firstly amplified sensing voltage compared with a reference voltage;
- a main amplifier unit for amplifying data outputted from the sense amplifier unit to output the data to a data buffer;
- and
- a data bus unit for connecting the sense amplifier units to the main amplifier unit to transmit read or written data.
2 more elements
Dependencies are inferred from the claim text.