SCL type FPGA with multi-threshold transistors and method for forming same

A field programmable gate array (FPGA) comprising:

• a plurality of fixed threshold and variable threshold transistors;
• a plurality of Schottky barrier diodes;
• a plurality of poly silicon film resistors;
• a plurality of capacitors;
• and
• a plurality of wiring tracks, wherein all of the elements are on a single substrate to form integrated circuits with implementing macro functions, wherein the circuit is software driven and wherein the at least a portion of the macro functions can be hardwired.

A field programmable gate array (FPGA) circuit comprising:

• a plurality of fixed threshold and variable threshold transistors;
• a plurality of Schottky barrier diodes;
• a plurality of poly silicon film resistors;
• a plurality of capacitors;
• and a plurality of wiring tracks, wherein all the elements are on a single substrate to form integrated circuits with implementing macro functions, wherein a part of the elements are user programmed and part of the elements are factory programmable, wherein the circuit is software driven.

A hardwired diode capacitor ladder circuit comprising:

• a plurality of fixed threshold and variable threshold transistors;
• a plurality of Schottky barrier diodes;
• a plurality of poly silicon film resistors;
• a plurality of capacitors;
• and
• a plurality of wiring tracks, wherein all of the elements are on a single substrate to form integrated circuits with implementing macro functions, wherein a plurality of voltage references are provided along the ladder.