Method for fabricating semiconductor integrated circuit device
AssigneeRenesas Technology Corp.
InventorsYoshikazu Tanabe, Satoshi Sakai, Nobuyoshi Natsuaki
Life of this patent
Estimating the term…
Abstract
A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.
Claims20
A method for fabricating a semiconductor integrated circuit device, comprising the steps of:
- (a) forming a first silicon oxide film on a first major surface of a wafer in a first wet oxidative atmosphere by thermal oxidation;
- (b) forming an oxidation barrier film over the first silicon oxide film;
- (c) patterning an opening in the oxidation barrier film and the first silicon oxide film;
- (d) forming an isolation groove in the first major surface of the wafer under the opening under the conditions that the patterned oxidation barrier film and the patterned first silicon oxide film exist;
- (e) forming a second silicon oxide film on an inner surface of the isolation groove in a second wet oxidative atmosphere in a heat treatment chamber by thermal oxidation;
- (f) after step (e), forming an insulating film over the oxidation barrier film and in the isolation groove;
- and
- (g) removing the insulating film outside the isolation groove so as to leave the insulating film inside the isolation groove,
- wherein the first wet oxidative atmosphere includes moisture synthesized from hydrogen gas and oxygen gas by catalyst.
Dependencies are inferred from the claim text.