Serial communication system and serial communication local terminal

A serial communication system for putting a line connecting between a CPU and a control IC into serial form, said system being provided between the CPU for outputting operation instructions for a drive device via a CPU control bus and the control IC for controlling driving of the drive device according to the operation instructions, said system comprising:

• a center terminal, connected to the CPU via the CPU control bus, for converting at least the operation instructions from a parallel signal to a serial signal for transmission to a serial communication line;
• and
• a local terminal, connected to the center terminal via the serial communication line, for reconverting at least the serially converted operation instructions back to a parallel signal for transmission to the control IC, said local terminal further comprising a CPU emulation controller for virtually generating the CPU control bus, and said local terminal being connected to the control IC via the virtual CPU control bus generated by the CPU emulation controller.

A serial communication local terminal for use in constructing a serial communication system for providing a line connecting between a CPU and a control IC into serial form, said system being provided between the CPU for outputting operation instructions for a drive device via a CPU control bus and the control IC for controlling driving of the drive device according to the operation instructions, and the system comprising a center terminal and a local terminal, the center terminal being connected to the CPU via the CPU control bus, for converting at least the operation instructions from a parallel signal to a serial signal for transmission to a serial communication line,

• wherein said local terminal is connected to the center terminal via the serial communication line, for reconverting at least the serially converted operation instructions back to a parallel signal for transmission to the control IC, said local terminal further comprises a CPU emulation controller for virtually generating the CPU control bus, and is connected to the control IC via the virtual CPU control bus generated by the CPU emulation controller.