Plasma display panel

A plasma display panel (PDP), comprising:

• a first substrate;
• a first electrode and a second electrode arranged respectively in parallel on the first substrate;
• a second substrate;
• an address electrode arranged on the second substrate;
• and
• a driving circuit that sends a driving signal to the first electrode, the second electrode and the address electrode during a reset period, an address period and a sustain period,
• wherein, during the reset period, the driving circuit,
• applies a first voltage level to the first electrode, while maintaining the second electrode at a second voltage level;
• applies a first voltage waveform to the second electrode, the first voltage waveform increasing with a first slope to a third voltage level, while maintaining the first electrode at a fourth voltage level;
• and
• applies a second voltage waveform to the second electrode, the second voltage waveform decreasing with a second slope to a fifth voltage level, while applying a sixth voltage level to the first electrode,
• wherein the fifth voltage level is a negative voltage.

A plasma display panel (PDP), comprising:

• a first substrate;
• a first electrode and a second electrode arranged respectively in parallel on the first substrate;
• a second substrate;
• an address electrode arranged on the second substrate;
• and
• a driving circuit that sends a driving signal to the first electrode, the second electrode and the address electrode during a reset period, an address period and a sustain period,
• wherein, during the reset period, the driving circuit,
• applies a first voltage waveform to the second electrode, the first voltage waveform decreasing from a first voltage level to a second voltage level, while maintaining the first electrode at a third voltage level;
• applies a second voltage waveform to the second electrode, the second voltage waveform increasing to a fourth voltage level, while maintaining the first electrode at a fifth voltage level;
• and
• applies a third voltage waveform to the second electrode, the third voltage waveform decreasing to a sixth voltage level, while applying a seventh voltage level to the first electrode,
• wherein the sixth voltage level is a negative voltage.

A plasma display panel (PDP), comprising:

• a first substrate;
• a first electrode and a second electrode arranged respectively in parallel on the first substrate;
• a second substrate;
• an address electrode arranged on the second substrate;
• and
• a driving circuit that sends a driving signal to the first electrode, the second electrode and the address electrode during a reset period, an address period and a sustain period,
• wherein, during the reset period, the driving circuit,
• applies a first voltage waveform to the second electrode, the first voltage waveform decreasing from a first voltage level to a second voltage level, while maintaining the first electrode at substantially the first voltage level;
• applies a second voltage waveform to the second electrode, the second voltage waveform increasing to a third voltage level, while maintaining the first electrode at a fourth voltage level;
• and
• applies a third voltage waveform to the second electrode, the third voltage waveform decreasing to a fifth voltage level, while applying a sixth voltage level to the first electrode,
• wherein the first voltage level is a positive voltage and the fifth voltage level is a negative voltage.