Cycle-efficient TDM timeslot remapping for network processing engines
AssigneeIntel Corporation
InventorsDaniel Borkowski, Nancy Borkowski
Life of this patent
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Abstract
A method and apparatus for remapping channel data are presented. Multiple successive frames carrying data in timeslots are received. The timeslots are assigned to channels so that data for the channels includes interleaved data. The data from the multiple successive frames for each of a predetermined number of the timeslots are aggregated. The aggregated data is mapped, by timeslot, to produce a timeslot-based map. The aggregated data of the timeslot-based map is remapped to produce a channel-based map in which the data for the channels are grouped together by channel in the order that the data were received.
Claims31
A method comprising:
- receiving successive frames carrying data in timeslots, the timeslots being assigned to channels so that data for the channels comprises interleaved data;
- aggregating the data from successive frames for each of a predetermined number of the timeslots;
- mapping the aggregated data, by timeslot, to produce a timeslot-based map;
- and
- remapping the aggregated data in the timeslot-based map to produce a channel-based map.
A method comprising:
- providing a channel-based map in which data are grouped together by channel;
- remapping the channel-based map to produce a timeslot-based map in which data to be transmitted in a number of consecutive frames over a serial link are grouped together by timeslot.
An article comprising:
- a storage medium having stored thereon instructions that when executed by a machine result in the following:
- for successive frames carrying data in timeslots assigned to channels so that data for the channels comprises interleaved data, aggregating the data from successive frames for each of a predetermined number of the timeslots;
- mapping the aggregated data, by timeslot, to produce a timeslot-based map;
- and
- remapping the aggregated data in the timeslot-based map to produce a channel-based map.
A network processor comprising:
- a serial interface;
- a network processor engine of multiple execution threads coupled to the serial interface;
- wherein the serial interface is configured to process successive frames carrying data in timeslots, the timeslots assigned to channels so that data for the channels comprises interleaved data, the processing including aggregating the data from successive frames for each of a predetermined number of the timeslots and mapping the aggregated data, by timeslot, to produce a timeslot-based map;
- and
- wherein at least one of the multiple execution threads, during execution, operates to remap the aggregated data in the timeslot-based map to produce a channel-based map.
A system comprising:
- a framer adapted to be coupled to a network;
- a network access device coupled to the framer, the network access device comprising a network processor;
- and
- the network processor comprising:
- a serial interface;
- a network processor engine of multiple execution threads coupled to the serial interface;
- wherein the serial interface is configured to process successive frames carrying data in timeslots, the timeslots assigned to channels so that data for the channels comprises interleaved data, the processing including aggregating the data from successive frames for each of a predetermined number of the timeslots and mapping the aggregated data, by timeslot, to produce a timeslot-based map;
- and
- wherein at least one of the multiple execution threads, during execution, operates to remap the aggregated data in the timeslot-based map to produce a channel-based map.
Dependencies are inferred from the claim text.