Semiconductor designing apparatus

Abstract

A semiconductor designing apparatus capable of effectively performing a layout designing operation and capable of developing both a circuit designing operation and a layout designing operation at the same time is provided. When a layout designing operation as to a semiconductor memory circuit and a semiconductor analog circuit is manually carried out in a semi-automatic designing manner, since a layout is produced every function, both an internal arranging operation and an internal wiring operation of structural elements can be omitted; also, since the structural elements can be separated, an internal shape of the structural elements can be easily changed; also, since an attribute of an element is changed, a degree of freedom as to a designing operation can be improved; also, since an instance can be added to an element, an insertion such as a substrate contact which does not depend upon a circuit diagram can be added to an arbitrary portion; and further, since a layout designing operation is commenced before a circuit diagram is determined and thereafter matching of net connections is confirmed, both the circuit designing operation and the layout designing operation can be carried out at the same time, so that a designing time period can be shortened.

Dependencies are inferred from the claim text.