System and method for determining timing characteristics of a circuit design
AssigneeHewlett-Packard Development Company, L.P.
InventorsSean Tyler, Thomas Asprey
Life of this patent
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Abstract
Systems and methods can be employed to determine one or more timing characteristics of a circuit design. In one embodiment, a system includes a calculator that provides an indication of slack for at least one node of a circuit design, the at least one node being capable of operating transparently and non-transparently. The indication of slack is determined based on a minimum of slack for paths that include the at least one node, regardless of path transparency.
Claims39
A system comprising:
- a calculator that provides an indication of slack for at least one node of a circuit design, the at least one node being capable of operating transparently and non-transparently, the indication of slack being determined based on a minimum slack value for paths that include the at least one node, regardless of path transparency.
A system to facilitate design of an integrated circuit, comprising:
- a path tracer that traces paths associated with a given node of a circuit design, regardless of path transparency;
- and
- a calculator that determines timing characteristics associated with the given node based on timing information for the traced paths, a minimum timing characteristic being selected from the timing characteristics determined for the traced paths associated with the given node.
A system comprising:
- means for tracing at least one path that includes a given node of a circuit design by analyzing the at least one path transparently, the given node being capable of operating transparently and non-transparently;
- and
- means for determining potential slack for the given node, the potential slack corresponding to a minimum slack value determined from slack values associated with the given node, including a slack value associated with the at least one path, based on timing information for the at least one path.
A computer-readable medium having computer-executable instructions for performing a method comprising:
- computing slack associated with a given node of a circuit design by analyzing each path associated with the given node transparently;
- and
- determining a potential slack value as a minimum of the computed slack associated with the given node.
A method comprising:
- determining a timing characteristic for a first path associated with a node of a given circuit design;
- determining the timing characteristic for at least a second path, regardless of path transparency, the second path including the node and at least a portion of the second path being capable of operating transparently and non-transparently, and
- providing an indication of timing performance associated with the node according to a minimum of the timing characteristic for a first path and the timing characteristic for at least a second downstream path.
Dependencies are inferred from the claim text.