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US 2005/0097264 A1Published application
Memory module with registers
AssigneeSamsung Electronics Co., Ltd.
InventorsKwang-Soo Park, Jeong-Hyeon Cho, Byung-Se So, Jung-Joon Lee, Young Yun, Kwang-Seop Kim
Life of this patent
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Abstract
Pairs of registers with reduced pins are disposed to overlap on front and back surfaces of a memory module. An input signal INS is transferred through the registers in series in a daisy chain fashion to avoid divergence of the input signal INS for preserved signal integrity. Each register buffers the input signal INS to memory banks disposed closely to sides of the register for reduced wiring area.
Claims21
A memory module comprising:
- a first pair of registers with each register being disposed on a respective one of front and back surfaces of the memory module with an overlap area between the registers of the first pair;
- wherein the first pair is disposed between a first plurality of semiconductor banks each disposed from different sides of the first pair;
- and wherein the first pair buffers data to each of the first plurality of semiconductor banks.
A memory module comprising:
- a first register for buffering an input signal to at least one semiconductor bank;
- and
- a second register for buffering the input signal to at least one semiconductor bank,
- wherein the input signal is coupled to the first register that outputs a signal equivalent to the input signal to the second register, without diverging the input signal.
1 more element
Dependencies are inferred from the claim text.