Simulator and simulation method

A simulator operable to represent elements including a processor, using a plurality of simulated elements, and to simulate behaviors of said processor,

• said plurality of simulated elements comprising:
• a memory element representing a memory operable to store executive instructions issued by said processor and data treated by said processor;
• a register element representing a register in said processor;
• and
• a control element representing a controller operable to access at least one of said memory element and said register element,
• wherein said simulator comprises:
• a command input unit operable to analyze an entered command and to operate said plurality of simulated elements;
• and
• a unit operable to check up on data access in which said control element provides access to at least one of said memory element and said register element.

A simulator operable to represent elements including a processor, using a plurality of simulated elements, and to simulate behaviors of said processor,

• said plurality of simulated elements comprising:
• a memory element representing a memory operable to store executive instructions issued by said processor and data treated by said processor;
• a register element representing a register in said processor;
• and
• a control element representing a controller operable to access at least one of said memory element and said register element,
• wherein said simulator comprises:
• a command input unit operable to analyze an entered command and to operate said plurality of simulated elements;
• and
• a unit operable to check whether or not at least one of said memory element and said register element has been initialized.

A simulator operable to represent elements including a processor, using a plurality of simulated elements, and to simulate behaviors of said processor, said plurality of simulated elements comprising:

• a memory element representing a memory operable to store executive instructions issued by said processor and data treated by said processor;
• a register element representing a register in said processor;
• and
• a control element representing a controller operable to access at least one of said memory element and said register element,
• wherein said simulator comprises:
• a command input unit operable to analyze an entered command and to operate said plurality of simulated elements;
• and
• a unit operable to check how conditioned instructions executed by said control element are executed.

A simulation method operable to represent elements including a processor, using a plurality of simulated elements, and to simulate behaviors of said processor,

• said plurality of simulated elements comprising:
• a memory element representing a memory operable to store executive instructions issued by said processor and data treated by said processor;
• a register element representing a register in said processor;
• and
• a control element representing a controller operable to access at least one of said memory element and said register element, and to execute conditioned instructions in accordance with a register value in said register element,
• wherein said simulation method comprises:
• analyzing an entered command to operate said plurality of simulated elements;
• and
• storing information on how said conditioned instructions are executed.

A simulation method operable to represent elements including a processor, using a plurality of simulated elements, and to simulate behaviors of said processor,

• said plurality of simulated elements comprising:
• a memory element representing a memory operable to store executive instructions issued by said processor and data treated by said processor;
• a register element representing a register in said processor;
• and
• a control element representing a controller operable to access at least one of said memory element and said register element,
• wherein said simulation method comprises:
• analyzing an entered command to operate said plurality of simulated elements;
• and
• checking up on resource access in which said control element provides access to at least one of said memory element and said register element.

A simulation method operable to represent elements including a processor, using a plurality of simulated elements, and to simulate behaviors of said processor,

• said plurality of simulated elements comprising:
• a memory element representing a memory operable to store executive instructions issued by said processor and data treated by said processor;
• a register element representing a register in said processor;
• and
• a control element representing a controller operable to access at least one of said memory element and said register element,
• wherein said simulation method comprises:
• analyzing an entered command to operate said plurality of simulated elements;
• and
• checking up on data access in which said control element provides access to at least one of said memory element and said register element.

A simulation method operable to represent elements including a processor, using a plurality of simulated elements, and to simulate behaviors of said processor,

• said plurality of simulated elements comprising:
• a memory element representing a memory operable to store executive instructions issued by said processor and data treated by said processor;
• a register element representing a register in said processor;
• and
• a control element representing a controller operable to access at least one of said memory element and said register element,
• wherein said simulation method comprises:
• analyzing an entered command to operate said plurality of simulated elements;
• and
• checking whether or not at least one of said memory element and said register element has been initialized.