Methods and systems for improved integrated circuit functional simulation
OwnerJames Wilson, Kenneth Imboden +1inventors
InventorsJames Wilson, Kenneth Imboden, David Gold
Life of this patent
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Abstract
Methods and systems for performing symbolic simulation, including techniques for translating a conventional simulation into a symbolic simulation, for handling wait and delay states, and for performing temporally out-of-order simulations. Additional techniques for extracting a signal graph from an HDL representation of a device, for representing signal values as functions of time using binary decision diagrams, and for computing minimal signal sets for accurate simulation. Techniques and methods for improving waveform dumping, reducing the waveform database, and for combining out-of-order simulation or reduced time steps with conventional time-based simulation.
Claims21
A method of developing a symbolic representation of a electronic device from a hardware description language representation of that device, wherein the hardware description language representation includes at least one event, comprising
- establishing a plurality of signal assignments,
- establishing at least one trigger to specify at which time steps an event occurs,
- establishing an association between the at least one trigger and at least one of the plurality of signal assignments,
- if the associated trigger is true at a given time step, applying to the signal the value computed by the at least one signal assignment associated with that trigger, and
- if the associated trigger is not true at a given time step, allowing the signal to retain the current value.
A method of representing the operation of an electronic device in accordance with a hardware description language representation of that device comprising
- establishing a plurality of vertices, where each vertex represents a signal,
- annotating each vertex with a set of assignments to the signal, and
- representing a dependency between two signals as an edge between the vertices associated with those signals.
A method for representing signal values as functions of time using binary decision diagrams comprising the steps of
- representing time as a bit vector of a predetermined number of ordered bits,
- establishing an ordered set of BDD variable indices,
- associating the ordered set of BDD variable indices with selected ones of a plurality of vertices, and
- mapping the ordered bits onto the ordered set of BDD variable indices, where the lower order indices appear above vertices with higher numbered indices.
A method for computing a minimal signal set capable of achieving a simulation comprising the steps of
- creating an extracted signal graph from a hardware description language representation of a device,
- establishing a plurality of vertices wherein each vertex represents a signal and a plurality of edges wherein each edge represents signals that are functions of other signals, and
- computing relationships between strongly connected components of the plurality of vertices and edges.
A method for translating a conventional simulation into a symbolic simulation comprising the steps of
- establishing a plurality of signal assignments,
- establishing at least one trigger to specify at which time steps an event occurs,
- establishing an association between the at least one trigger and at least one of the plurality of signal assignments,
- setting the value of a signal in accordance with the value of the trigger at a given time step, and
- calculating a minimal signal set for representing the operation of a device.
A method for performing signal ordered simulation of a device represented in a hardware description language comprising the steps of
- computing signal dependencies specifying functional relationships among a plurality of signals,
- computing strongly connected components from the signal dependencies,
- computing a component graph for the signal dependencies,
- processing a first strongly connected component in component graph order, and
- simulating the signals in each strongly connected component for substantially all time steps before simulating any signals in the next-in-order strongly connected component.
A system for developing a symbolic representation of a electronic device from a hardware description language representation of that device, wherein the hardware description language representation includes at least one event, comprising
- a first storage area for storing a plurality of signal assignments,
- a second storage area for storing at least one trigger to specify at which time steps an event occurs, and
- processing means for associating the at least one trigger and at least one of the plurality of signal assignments, wherein the processing means applies to the signal the value computed by the at least one signal assignment associated with that trigger if the associated trigger is true at a given time step, and allows the signal to retain the current value if the associated trigger is not true at a given time step.
Dependencies are inferred from the claim text.