Flip chip package using no-flow underfill and method of fabrication
AssigneeAdvanpack Solutions Pte Ltd.
InventorsTan Hwee, Roman Perez, Antonio Dimaano, Lau Kwang, Alex Chew
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Abstract
A design and method of fabrication for a semiconductor package is described. A solder bumped semiconductor chip is assembled to a metallized package substrate utilizing the solder bumps. The interconnecting solder bumps are properly constrained at assembly by the introduction of a no-flow underfill between the chip and the substrate. The no-flow underfill constrains the solder of the solder bumps so as to maintain the desired size and shape.
Claims15
A semiconductor package comprising:
- a solder bumped semiconductor chip;
- a surface metallized substrate, connected at said solder bumps to said solder bumped semiconductor chip;
- and,
- a no-flow underfill surrounding connection points of said solder bumped semiconductor chip and said surface metallized substrate.
A method of fabricating a semiconductor package, the method comprising the steps of:
- providing a semiconductor chip with a plurality of solder bumps on the surface;
- providing a substrate with a metallized top surface;
- disposing a no-flow underfill to the metallized surface of said surface metallized substrate;
- positioning said solder bumped semiconductor chip in contact with said surface metallized substrate to form an assembly;
- curing the no-flow underfill;
- and
- reflowing said assembly.
Dependencies are inferred from the claim text.