FPGA architecture with mixed interconnect resources optimized for fast and low-power routing and methods of utilizing the same

A computer-readable storage medium comprising computer-executable code for routing a user circuit in a field programmable gate array (FPGA), the medium comprising:

• code for determining a set of critical paths in the user circuit;
• code for determining a set of non-critical paths in the user circuit;
• code for determining a first set of interconnect resources in the FPGA that are configured and arranged for high speed;
• code for determining a second set of interconnect resources in the FPGA that are configured and arranged for low power;
• and
• code for assigning each path in the set of critical paths to at least one of the interconnect resources in the first set.

A computer system for routing a user circuit in a field programmable gate array (FPGA), comprising:

• a critical path determining module for determining a set of critical paths in the user circuit;
• a non-critical path determining module for determining a set of non-critical paths in the user circuit;
• a high speed routing determining module for determining a first set of interconnect resources in the FPGA that are configured and arranged for high speed;
• a low power routing determining module for determining a second set of interconnect resources in the FPGA that are configured and arranged for low power;
• and
• a critical path assigning module for assigning each path in the set of critical paths to at least one of the interconnect resources in the first set.

A method of routing a user circuit in a field programmable gate array (FPGA), the method comprising:

• determining a first set of interconnect resources in the FPGA that are configured and arranged for high speed;
• determining a second set of interconnect resources in the FPGA that are configured and arranged for low power;
• assigning a first and higher cost to the interconnect resources in the first set;
• assigning a second and lower cost to the interconnect resources in the second set;
• and
• routing the design using timing-driven routing software designed to meet specified timing requirements while minimizing a cost function utilizing the costs assigned to the interconnect resources in the first and second sets.

A computer-readable storage medium comprising computer-executable code for routing a user circuit in a field programmable gate array (FPGA), the medium comprising:

• code for determining a first set of interconnect resources in the FPGA that are configured and arranged for high speed;
• code for determining a second set of interconnect resources in the FPGA that are configured and arranged for low power;
• code for assigning a first and higher cost to the interconnect resources in the first set;
• code for assigning a second and lower cost to the interconnect resources in the second set;
• and
• code for routing the design using timing-driven routing software designed to meet specified timing requirements while minimizing a cost function utilizing the costs assigned to the interconnect resources in the first and second sets.

A computer system for routing a user circuit in a field programmable gate array (FPGA), comprising:

• a high speed routing determining module for determining a first set of interconnect resources in the FPGA that are configured and arranged for high speed;
• a low power routing determining module for determining a second set of interconnect resources in the FPGA that are configured and arranged for low power;
• a first cost assigning module for assigning a first and higher cost to the interconnect resources in the first set;
• a second cost assigning module for assigning a second and lower cost to the interconnect resources in the second set;
• and
• a routing module for routing the design using timing-driven routing software designed to meet specified timing requirements while minimizing a cost function utilizing the costs assigned to the interconnect resources in the first and second sets.

A method of routing a user circuit in a programmable logic device (PLD), the method comprising:

• determining a set of critical paths in the user circuit;
• determining a set of non-critical paths in the user circuit;
• determining a first set of interconnect resources in the PLD that are configured and arranged for high speed;
• determining a second set of interconnect resources in the PLD that are configured and arranged for low power;
• and
• assigning each path in the set of critical paths to at least one of the interconnect resources in the first set.

A computer-readable storage medium comprising computer-executable code for routing a user circuit in a programmable logic device (PLD), the medium comprising:

• code for determining a set of critical paths in the user circuit;
• code for determining a set of non-critical paths in the user circuit;
• code for determining a first set of interconnect resources in the PLD that are configured and arranged for high speed;
• code for determining a second set of interconnect resources in the PLD that are configured and arranged for low power;
• and
• code for assigning each path in the set of critical paths to at least one of the interconnect resources in the first set.

A computer system for routing a user circuit in a programmable logic device (PLD), comprising:

• a critical path determining module for determining a set of critical paths in the user circuit;
• a non-critical path determining module for determining a set of non-critical paths in the user circuit;
• a high speed routing determining module for determining a first set of interconnect resources in the PLD that are configured and arranged for high speed;
• a low power routing determining module for determining a second set of interconnect resources in the PLD that are configured and arranged for low power;
• and
• a critical path assigning module for assigning each path in the set of critical paths to at least one of the interconnect resources in the first set.

A method of routing a user circuit in a programmable logic device (PLD), the method comprising:

• determining a first set of interconnect resources in the PLD that are configured and arranged for high speed;
• determining a second set of interconnect resources in the PLD that are configured and arranged for low power;
• assigning a first and higher cost to the interconnect resources in the first set;
• assigning a second and lower cost to the interconnect resources in the second set;
• and
• routing the design using timing-driven routing software designed to meet specified timing requirements while minimizing a cost function utilizing the costs assigned to the interconnect resources in the first and second sets.

A computer-readable storage medium comprising computer-executable code for routing a user circuit in a programmable logic device (PLD), the medium comprising:

• code for determining a first set of interconnect resources in the PLD that are configured and arranged for high speed;
• code for determining a second set of interconnect resources in the PLD that are configured and arranged for low power;
• code for assigning a first and higher cost to the interconnect resources in the first set;
• code for assigning a second and lower cost to the interconnect resources in the second set;
• and
• code for routing the design using timing-driven routing software designed to meet specified timing requirements while minimizing a cost function utilizing the costs assigned to the interconnect resources in the first and second sets.

A computer system for routing a user circuit in a programmable logic device (PLD), comprising:

• a high speed routing determining module for determining a first set of interconnect resources in the PLD that are configured and arranged for high speed;
• a low power routing determining module for determining a second set of interconnect resources in the PLD that are configured and arranged for low power;
• a first cost assigning module for assigning a first and higher cost to the interconnect resources in the first set;
• a second cost assigning module for assigning a second and lower cost to the interconnect resources in the second set;
• and
• a routing module for routing the design using timing-driven routing software designed to meet specified timing requirements while minimizing a cost function utilizing the costs assigned to the interconnect resources in the first and second sets.