Method for programming and erasing an nrom cell
AssigneeMicron Technology, Inc.
InventorAndrei Mihnea
Life of this patent
Estimating the term…
Abstract
A nitride read only memory (NROM) cell can be programmed by applying a ramp voltage to the gate input, a constant voltage to one of the two source/drain regions, and a ground potential to the remaining source/drain region. In order to erase the NROM cell, a constant voltage is coupled to the gate input. A constant positive current is input to one of the source/drain regions. The remaining source/drain region is either allowed to float, is coupled to a ground potential, or is coupled to the first source/drain region
Claims27
A method for programming a nitride read only memory cell having a gate input and two source/drain regions, the method comprising:
- applying a ramp voltage to the gate input;
- applying a constant voltage to one of the two source/drain regions;
- and
- applying a ground potential to the remaining source/drain region.
A nitride read only memory (NROM) cell embedded in a CMOS device, the NROM cell comprising:
- a gate input coupled to a ramp voltage;
- a first source/drain region coupled to a constant voltage;
- and
- a second source/drain region coupled to a ground potential.
A method for performing an erase operation on a nitride read only memory cell having a gate input and two source/drain regions, the method comprising:
- applying a constant voltage to the gate input;
- applying a constant positive current into a first of the source/drain regions;
- and
- allowing the remaining source/drain region to float.
A method for erasing a nitride read only memory cell having a gate input and two source/drain regions, the method comprising:
- applying a constant voltage to the gate input;
- applying a constant positive current into a first of the source/drain regions;
- and
- applying a ground potential to the remaining source/drain region.
A method for erasing a nitride read only memory cell having a gate input and two source/drain regions, the method comprising:
- applying a constant voltage to the gate input;
- applying a constant positive current into a first source/drain region;
- and
- coupling the remaining source/drain region to the first source/drain region.
A method for erasing a nitride read only memory cell having a gate input and two source/drain regions, the method comprising:
- applying a constant voltage to a first of the source/drain regions;
- applying a negatively ramped voltage to the gate input;
- and
- allowing the remaining source/drain region to float.
A method for erasing a nitride read only memory cell having a gate input and two source/drain regions, the method comprising:
- applying a constant voltage to a first of the source/drain regions;
- applying a negatively ramped voltage to the gate input;
- and
- coupling the remaining source/drain region to the first source/drain region.
A method for erasing a nitride read only memory cell having a gate input and two source/drain regions, the method comprising:
- applying a constant voltage to a first of the source/drain regions;
- applying a negatively ramped voltage to the gate input;
- and
- applying a ground potential to the remaining source/drain region.
Dependencies are inferred from the claim text.