Method system and synchronization circuit for providing hardware component access to a set of data values without restriction

A system for providing hardware component access to a set data values in a set of registers, comprising:

• a first set of registers operating at a first frequency;
• a second set of registers operating at a second frequency;
• and
• a synchronization circuit for processing a control signal to communicate sets of data values between the first set of registers and the second set of registers, wherein the synchronization circuit stretches the control signal, synchronizes the control signal with a clock signal having the second frequency, and synchronizes the control signal with a clock signal having the first frequency.

A synchronization circuit for processing a control signal to provide hardware component access to a set of data values in a set of registers, comprising:

• a first set of logic operating at a first frequency that stretches the control signal;
• a second set of logic operating at a second frequency that synchronizes the control signal with a clock signal having the second frequency so that an initial set of data values can be communicated from a first set of registers operating at the first frequency to a second set of registers operating at the second frequency;
• and
• a third set of logic operating at the first frequency that synchronizes the control signal with a clock signal having the first frequency so that a current set of data values can be communicated from the second set of registers to the first set of registers, wherein the current set of values is accessible in the first set of registers by a hardware component.