High k gate insulator removal
AssigneeLSI Corporation
InventorsArvind Kamath, Wai Lo, Venkatesh Gopinath
Life of this patent
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Abstract
A method of forming a high k gate insulation layer in an integrated circuit on a substrate. A high k layer is deposited onto the substrate, and patterned with a mask to define the high k gate insulation layer and exposed portions of the high k layer. The exposed portions of the high k layer are subjected to an ion implanted species that causes lattice damage to the exposed portions of the high k layer. The lattice damaged exposed portions of the high k layer are etched to leave the high k gate insulation layer.
Claims16
A method of forming a high k gate insulation layer in an integrated circuit on a substrate, the method comprising the steps of:
- depositing a high k layer onto the substrate,
- patterning the high k layer with a mask to define the high k gate insulation layer and exposed portions of the high k layer,
- subjecting the exposed portions of the high k layer to an ion implanted species that causes lattice damage to the exposed portions of the high k layer, and
- etching the lattice damaged exposed portions of the high k layer to leave the high k gate insulation layer.
A method of forming a high k gate insulation layer in an integrated circuit on a substrate, the method comprising the steps of:
- forming a base interface layer on the substrate,
- depositing a high k layer of HfO2 onto the base interface layer,
- patterning the high k layer with a gate electrode layer and an overlying hard mask to define the high k gate insulation layer and exposed portions of the high k layer,
- subjecting the exposed portions of the high k layer to an ion implanted species that causes lattice damage to the exposed portions of the high k layer, and
- etching the lattice damaged exposed portions of the high k layer and the underlying base interface layer with HF to leave the high k gate insulation layer.
A method of forming a high k gate insulation layer in an integrated circuit on a substrate, the method comprising the steps of:
- forming a base interface layer on the substrate,
- depositing a high k layer of HfO2 onto the base interface layer,
- patterning the high k layer with a gate electrode layer and adjacent gate electrode sidewall spacers to define the high k gate insulation layer and exposed portions of the high k layer,
- subjecting the exposed portions of the high k layer to an ion implanted species that causes lattice damage to the exposed portions of the high k layer, where the ion implanted species also forms source/drain regions in the substrate, and
- etching the lattice damaged exposed portions of the high k layer and the underlying base interface layer with HF to leave the high k gate insulation layer.
Dependencies are inferred from the claim text.