Memory cell, memory device and manufacturing method of memory cell
AssigneeSharp Kabushiki Kaisha
InventorMorimoto Hidenori
Life of this patent
Estimating the term…
Abstract
A memory cell in which a variable resistive element and a Schottky diode are connected in series to each other. In a memory device, bit lines are arranged in a column direction, one end of the bit line is connected to a bit line decoder, and the other end thereof is connected to a reading circuit. Word lines are arranged in a row direction so as to intersect with the bit lines, and both ends of the word line are connected to word line decoders. In other words, the bit line and the word line are arranged in a matrix and a memory cell is located at a position where the bit line and the word line intersect with each other, which constitutes the memory device. An influence of a reading disturbance in the memory cell and the memory device is reduced.
Claims46
A memory cell comprising a variable resistive element and a current control element controlling a current flowing in said variable resistive element, wherein said current control element is a Schottky diode.
A memory device in which memory cells are located at positions where word lines and bit lines arranged in a matrix intersect with each other, wherein
- said memory cell is constituted by a series circuit including a variable resistive element and a Schottky diode controlling a current flowing in said variable resistive element, and
- one end of said series circuit is connected to said word line, and other end of the same is connected to said bit line, respectively.
A manufacturing method of forming a memory cell constituted by a series circuit of a variable resistive element and a Schottky diode, on a semiconductor substrate, comprising steps of
- forming an insulating film having openings on which impurity regions formed on one surface of said semiconductor substrate are exposed;
- depositing a metal film constituting an electrode of said variable resistive element in said openings of said insulating film;
- depositing a variable resistive film constituting a resistor of said variable resistive element on said metal film;
- and
- forming a Schottky diode by forming a metal silicide film between said impurity region and said metal film by a heat treatment.
A manufacturing method of forming a memory cell constituted by a series circuit of a variable resistive element and a Schottky diode, on a semiconductor substrate, comprising steps of:
- forming an insulating film having openings on which impurity regions formed on one surface of said semiconductor substrate are exposed;
- depositing a metal film constituting an electrode of said variable resistive element in said openings of said insulating film;
- depositing a variable resistive film having a first film thickness and constituting a resistor of said variable resistive element on said metal film;
- forming a Schottky diode by forming a metal silicide film between said impurity region and said metal film by a heat treatment, and
- depositing a variable resistive film having a second film thickness and constituting said resistor on said variable resistive film having said first film thickness.
A manufacturing method of forming a memory cell constituted by a series circuit of a variable resistive element and a Schottky diode, on a semiconductor substrate, comprising steps of:
- selectively forming a polycrystalline silicon region in an insulating film formed on one surface of said semiconductor substrate;
- depositing a metal film constituting an electrode of said variable resistive element on said polycrystalline silicon region;
- depositing a variable resistive film constituting a resistor of said variable resistive element on said metal film;
- and
- forming a Schottky diode by forming a metal silicide film between said polycrystalline silicon region and said metal film by a heat treatment.
A manufacturing method of forming a memory cell constituted by a series circuit of a variable resistive element and a Schottky diode, on a semiconductor substrate, comprising steps of:
- selectively forming a polycrystalline silicon region in an insulating film formed on one surface of said semiconductor substrate;
- depositing a metal film constituting an electrode of said variable resistive element on said polycrystalline silicon region;
- depositing a variable resistive film having a first film thickness and constituting a resistor of said variable resistive element on said metal film;
- forming a Schottky diode by forming a metal silicide film between said polycrystalline silicon region and said metal film by a heat treatment;
- and
- depositing a variable resistive film having a second film thickness and constituting said resistor on said variable resistive film having said first film thickness.
Dependencies are inferred from the claim text.