Nonvolatile memory with error correction for page copy operation and method thereof
AssigneeSamsung Electronics Co., Ltd.
InventorJin-Yub Lee
Life of this patent
Estimating the term…
Abstract
The disclosure is a NAND flash memory with the function of error checking and correction during a page copy operation. The NAND flash memory is able to prohibit transcription of erroneous bits to a duplicate page from a source page. Embodiments of the inventive flash memory include a correction circuit for correcting bit errors of source data stored in a page buffer, a circuit configured to provide the source data to the correction circuit and to provide correction data to the page buffer, and a copy circuit configured to copy the source data to the page buffer, and to store the correction data in the other page from the page buffer.
Claims19
A nonvolatile memory comprising:
- a plurality of pages storing data;
- a page buffer temporarily storing data by the page;
- a correction circuit for correct a bit error of source data of a specific one of the pages;
- a transferring circuit configured to provide the source data to the correction circuit and to provide amended data to the page buffer from the correction circuit;
- and
- a replicating circuit configured to copy the source data into the page buffer and to store the amended data into another page from the page buffer.
A nonvolatile memory comprising:
- a data field composed of a plurality of pages for storing data;
- a first storage configured to store first parities in a predetermined region of the data field, the first parities being generated during a programming operation for the page;
- a page buffer for temporarily storing data by the page;
- a moving circuit configured to copy source data stored in a specific one of the pages into the page buffer;
- a parity circuit configured to generate second parities from the source data stored in the page buffer;
- and
- a transfer circuit configured to transfer modified data of the source data to the page buffer in response to a result of comparing the first parities with the second parities.
A method of transferring source data of a specific page to another page in a nonvolatile memory having a page buffer structured to temporarily store data by the page, the source data containing old parities, the method comprising:
- storing the source data into the page buffer;
- generating new parities from the source data stored in the page buffer;
- comparing the old parities with the new parities;
- creating modified data from the source data in response to a result of the comparing;
- and
- moving the modified data to the another page through the page buffer.
A nonvolatile memory comprising:
- a data storage field composed of a plurality of pages storing data;
- a page buffer for storing data of a specific one of the pages, being connected to the data storage field;
- and
- an error correction circuit connected to the page buffer and including:
- a bit error detection circuit configured to detect a bit error of the data of the specific page;
- and a bit error correction circuit configured to amend the bit error.
Dependencies are inferred from the claim text.