Memory device with sense amplifier and self-timed latch

A memory device comprising:

• a plurality of memory cells, each of the plurality of memory cells coupled to a first bit line and to a second bit line;
• a first data line coupled to the first bit line during at least a portion of a read cycle;
• a second data line coupled to the second bit line during at least a portion of the read cycle;
• a sense amplifier having a pair of cross-coupled inverters, the pair of cross-coupled inverters being coupled to the first data line and to the second data line for amplifying a data signal from a selected one of the plurality of memory cells in response to asserting a sense enable signal;
• a first buffer circuit having an input coupled to the first data line and an output;
• a second buffer circuit having an input coupled to the second data line and an output;
• a self-timed storage device having a first input coupled to the output of the first buffer circuit and a second input coupled to the output of the second buffer circuit, the self-timed storage device responsive only to a differential voltage between the output of the first buffer circuit and the output of the second buffer circuit.

A method for reading a memory cell of a memory device, the memory device comprising a plurality of memory cells, each of the plurality of memory cells coupled to a bit line and to a word line, the method comprising:

• selecting at least one of the plurality of memory cells;
• sensing and amplifying a voltage on the bit line using a sense amplifier in response to asserting a sense enable signal to produce an amplified data signal, the amplified data signal representative of a logic state stored in the at least one of the plurality of memory cells selected by the selecting;
• decoupling the bit line from the sense amplifier at about the same time as the sense enable signal is asserted;
• and
• latching data corresponding to the amplified data signal in a self-timed latch, the self-timed latch latching the data in response to only the amplified data signal.