Liquid crystal display and method of manufacturing the same

A liquid crystal display, comprising:

• an ILD layer formed on a glass substrate and covering a thin film transistor fabricated thereon;
• a first contact hole through said ILD layer;
• an interconnecting layer formed in said first contact hole to electrically connect to said thin film transistor;
• a passivation layer formed on said ILD layer and covering said interconnecting layer;
• a second contact hole through said passivation layer to expose a portion of upper surface of said interconnecting layer;
• a planarizing film covering side walls of said second contact hole, and at least a portion of bottom surface of said second contact hole being exposed;
• and
• a pixel electrode being electrically connected to said interconnecting layer via the exposed bottom surface of said second contact hole.

A method for manufacturing a liquid crystal display, comprising:

• forming an ILD layer on a glass substrate and covering a device fabricated thereon;
• forming a first contact hole in said ILD layer to expose a portion of upper surface of said device;
• forming an interconnecting layer in said first contact hole to electrically connect to said device;
• forming a passivation layer on said ILD layer and covering said interconnecting layer;
• forming a second contact hole in said passivation layer to expose a portion of upper surface of said interconnecting layer;
• forming a planarizing film on said passivation layer and filling said second contact hole;
• forming a third contact hole in said planarizing film to expose a portion of bottom surface of said second contact hole, wherein side walls of said second contact hole are completely covered by said planarizing film;
• and
• forming a pixel electrode on said planarizing film and covering the surface of said third contact hole to electrically connect to said interconnecting layer.

A method of manufacturing an LCD, comprising:

• forming an ILD layer on a glass substrate and covering a thin film transistor fabricated thereon;
• forming a first contact hole in said ILD layer to expose a portion of upper surface of said thin film transistor;
• forming an interconnecting layer in said first contact hole to electrically connect to said thin film transistor;
• forming a passivation layer on said ILD layer and covering said interconnecting layer;
• forming a second contact hole in said passivation layer to expose a portion of upper surface of said interconnecting layer;
• forming a planarizing film on said passivation layer and filling said second contact hole;
• forming a third contact hole in said planarizing film to expose a portion of bottom surface of said second contact hole, wherein side walls of said second contact hole are completely covered by said planarizing film;
• and
• forming a pixel electrode on said planarizing film and covering the surface of said third contact hole to electrically connect to said interconnecting layer.