Voltage supply distribution architecture for a plurality of memory modules
AssigneeSTMicroelectronics S.r.l.
InventorsMarco Pasotti, Guido De Sandre, David Iezzi, Gilberto Muzzi, Marco Poles
Life of this patent
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Abstract
An architecture for distributing supply voltages to a plurality of memory modules supplied through a plurality of charge pump circuits may include a sorting block bi-directionally connected to the plurality of memory modules, from which it may receive a plurality of power requests. The sorting block may provide a sorting signal based upon a priority scale to drive the plurality of charge pump circuits and distribute supply voltages to the plurality of memory modules. The architecture may advantageously be software-configurable.
Claims26
1-13. (canceled)
A memory device comprising:
- a plurality of memory modules for performing memory operations and generating power requests therefor;
- a plurality of charge pump circuits for generating supply voltages for said memory modules;
- and
- an arbitrator for receiving the power requests from said memory modules, sorting the power requests for said charge pump circuits based upon a priority scale, and distributing the supply voltages from said charge pump circuits to said memory modules based upon the sorted power requests.
A arbitrator for distributing supply voltages from a plurality of charge pump circuits to a plurality of memory modules, the memory modules generating power requests, the arbitrator comprising:
- a sorting block connected to the memory modules for sorting the power requests for the charge pump circuits based upon a priority scale and generating a sorting signal based thereon;
- and
- a switching block connected between the memory modules and the charge pump circuits for providing the sorted power requests to said charge pump circuits based upon the sorting signal, and distributing the supply voltage from said charge pump circuits to said memory modules based upon the sorted power requests.
A method for distributing supply voltages from a plurality of charge pump circuits to a plurality of memory modules comprising:
- generating power requests for the memory modules;
- sorting the power requests for the charge pump circuits based upon a priority scale;
- and
- distributing the supply voltages from the charge pump circuits to the memory modules based upon the sorted power requests.
A computer-readable medium having computer-executable instructions for performing steps for distributing supply voltages from a plurality of charge pump circuits to a plurality of memory modules, the memory modules generating power requests for supply voltages, the steps comprising:
- sorting the power requests for the charge pump circuits based upon a priority scale;
- and
- distributing the supply voltages from the charge pump circuits to the memory modules based upon the sorted power requests.
Dependencies are inferred from the claim text.