Multi-chip circuit module and method for producing the same
AssigneeSony Corporation
InventorsTsuyoshi Ogawa, Yuji Nishitani
Life of this patent
Estimating the term…
Abstract
A multi-chip circuit module on which semiconductor chips are loaded and which is provided with circuit patterns, input/output terminals or the like for interconnecting the semiconductor chips. A multi-layered wiring section (2) is formed by respective unit wiring layers (8) to (12) in such a manner that an upper unit wiring layer is layered on a surface-planarized subjacent unit wiring layer and connected to one another by inter-layer connection by a via-on-via structure. A semiconductor chip (6) mounted on this multi-layer wiring section (2) is polished along with the sealing resin layer (7) for reducing the thickness.
Claims13
A multi-chip circuit module comprising:
- a multi-layered wiring section in which a plurality of unit wiring layers having a preset circuit pattern formed in an insulating layer and having planarized surfaces are connected layer-to-layer to provide a multi-layered structure, and in which a connection terminal is provided to the unit wiring layer forming an outermost layer;
- a semiconductor chip mounted on the major surface of at least one outermost unit wiring layer of said multi-layered wiring section;
- and
- a sealing resin layer provided on the major surface of the outermost unit wiring layer for sealing the semiconductor chip and the connection terminal;
- characterized in that
- a polishing processing of polishing said semiconductor chip and for exposing said connection terminal is applied to said sealing resin layer, whereby the thickness of the circuit module and the wiring length of the semiconductor chip are reduced.
13-23 (Canceled)
Dependencies are inferred from the claim text.