Field plate structure for high voltage devices

A semiconductor device comprising:

• a semiconductor substrate of a first conductivity;
• an epitaxially formed semiconductor layer of a second conductivity formed over said substrate;
• a body region of said first conductivity formed in said epitaxially formed semiconductor layer;
• a source region of said second conductivity formed in said body region, said source region being adjacent an invertible channel in said body region;
• a gate structure formed over said invertible channel region, said gate structure including a gate electrode which is spaced from said invertible channel by a gate insulation layer;
• a drain region formed in said epitaxially formed semiconductor layer, said drain region and said body region being spaced from one another by a drift region in said epitaxially formed semiconductor layer;
• and
• a field plate structure disposed over said drift region, said field plate structure including a first field plate disposed over a first insulation layer of a first thickness, a second field plate disposed over a second insulation layer of a second thickness, said second insulation layer being formed over said first insulation layer, and a third field plate spaced from said second field plate by a third insulation layer of a third thickness.