Interposer substrates with multi-segment interconnect slots, semiconductor die packages including same, semiconductor dice for use therewith and methods of fabrication

Abstract

A board-on-chip (BOC) semiconductor package includes a multisegmented, longitudinally slotted interposer substrate through which an elongate row of die bond pads is accessed for electrical attachment, as by wire bonding, to conductive traces on the opposite side of the interposer substrate. One or more reinforcements in the form of crosspieces or bridges span and segment intermediate portions of the substrate slot to resist bending stresses acting in the slot region proximate the centerline of the interposer substrate tending to crack or delaminate a polymer wire bond mold cap filling and covering the slot and the wire bonds. Various interposer substrate configurations are also disclosed, as are methods of fabrication.

Dependencies are inferred from the claim text.