Method and system for scheduling software pipelined loops
AssigneeIntel Corporation
InventorLynd M. Stringer
Life of this patent
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Abstract
A method and a system for scheduling a software pipelined loop with indirect loads. The system may include a data structure in communication with a processor and a memory. The processor may determine a condition associated with a potential for saturation of the data structure. Accordingly, the processor may provide a number of instructions associated with the software pipelined loop from the memory to a queue of the data structure prior to processing of the instructions by the processor based on the condition associated with a potential for saturation of the data structure.
Claims19
A method for scheduling a software pipelined loop, the method comprising:
- determining a condition associated with a potential for saturation of a data structure, the data structure being in communication with a processor and a memory;
- and
- providing a number of instructions associated with the software pipelined loop from the memory to a queue of the data structure prior to processing of the instructions by the processor based on the condition associated with a potential for saturation of the data structure.
A system for scheduling a software pipelined loop, the system comprising:
- a memory;
- a bus operatively coupled to the memory;
- a data structure operatively coupled to the bus, the data structure having a queue;
- a processor operatively coupled to the data structure, the processor having a register and a cache,
- the processor being programmed to determine a condition associated with a potential for saturation of a data structure, the data structure being in communication with a processor and a memory, and
- the processor being programmed to provide a number of instructions associated with the software pipelined loop from the memory to the queue of the data structure prior to processing of the instructions by the processor based on the condition associated with a potential for saturation of the data structure.
In a communication system, wherein a processor operates in accordance with a computer program embodied on a computer-readable medium for schedule a software pipelined loop, the computer program comprising:
- a first routine that directs the processor to determine a condition associated with a potential for saturation of a data structure, the data structure being in communication with a processor and a memory;
- and
- a second routine that directs the processor to provide a number of instructions associated with the software pipelined loop from the memory to a queue of the data structure prior to processing of the instructions by the processor based on the condition associated with a potential for saturation of the data structure.
A method for scheduling a software pipelined loop, the method comprising:
- determining the capacity of a data structure, the data structure being in communication with a processor and a memory;
- and
- storing the data structure with a number of indirect loads associated with the software pipelined loop from the memory, the number of indirect loads being based on the capacity of the data structure.
Dependencies are inferred from the claim text.